Diodes, Zener Regulators & Bipolar Junction Transistor Fundamentals

Semiconductor Review & Diode Fundamentals

• Ideal diode equation recalled
  $I = I<em>S\left(e^{\frac{V}{V</em>T}} - 1\right)$
  • $I$ – diode current
  • $V$ – diode voltage
  • $I<em>S$ – reverse‐saturation current (≈ nano- to pico-amps) • $V</em>T = \frac{kT}{q} \approx 25\,\text{mV}$ at room temperature

• Practical implication of the equation
  • Very little current flows until the junction voltage exceeds the “knee” (≈ $0.5\text{–}0.7\,\text{V}$ for Si)
  • Beyond the knee, current grows exponentially while the terminal voltage stays almost fixed – the device behaves like a voltage clamp.

• I–V characteristic sketch
  • Forward region: negligible current until $V_D \gtrsim 0.7\,\text{V}$
  • Reverse region: almost zero current until breakdown
  • Two destructive breakdown mechanisms were reviewed
  – Zener (field) breakdown: extremely high electric field ruptures covalent bonds
  – Avalanche breakdown: carriers accelerated by the field collide with the lattice, generating secondary carriers in a chain reaction
  • Without current-limiting resistance, both processes overheat and destroy a standard diode.

Zener Diodes & Voltage-Clamping Circuits

• Zener diode: A PN junction purposely doped and packaged so that avalanche/Zener breakdown is non-destructive over a specified current range → usable as a voltage regulator.

• Forward direction – identical to a normal diode (≈ $0.7\,\text{V}$ drop).

• Reverse direction – clamps at the specified Zener voltage $V_Z$ (e.g.
  $5.1\,\text{V}, 6.2\,\text{V}, …$).

• Application sketches
  • Simple clipper: series resistor $R<em>S$ + diode; output equals input until $|v</em>{IN}|$ exceeds knee (forward) or $|v<em>{IN}|$ exceeds $V</em>Z$ (reverse).
  • Used in DC regulators to maintain a fixed voltage under line/load changes.

Bipolar Junction Transistor (BJT) Overview

• Device type studied: Bipolar Junction Transistor (BJT) – emphasis on NPN, but all principles mirror for PNP with polarity reversal.

• Physical structure
  • Three adjoining regions: Emitter (E), Base (B), Collector (C).
  • Two PN junctions → E–B and B–C.
  • Modern IC fabrication is vertical: substrate (collector), thin epitaxial base, heavily doped emitter diffused from top.

• Critical design rules

  1. Base must be extremely thin ⇒ minority carriers injected from emitter reach B–C depletion region before recombining.
  2. $N<em>D(\text{Emitter}) \gg N</em>D(\text{Collector}) \gg N_A(\text{Base})$ (two orders of magnitude typical).
     – High emitter doping → large electron injection efficiency.
     – Lightly-doped base widens depletion width into base, further thinning the neutral base region.
     – Collector doping kept moderate to support high reverse voltage without punch-through.

• Schematic symbols & conventional‐current arrow
  • NPN: arrow on emitter points out of the base (holes flowing B→E).
  • PNP: arrow points into the base.
  • Warning: A BJT is not two back-to-back diodes – the extremely thin shared base layer is essential.

Modes of Operation (NPN conventions)

Carrier-Flow Insight in Forward Active Mode (NPN)

• Step-by-step

  1. $V_{BE}$ forward biases E–B junction → electrons injected E→B.
  2. Because base is thin & lightly doped, most electrons diffuse across base without recombining.
  3. At B–C depletion region the field sweeps electrons into collector → collector current $I_C$.
  4. A tiny fraction of electrons recombine with base holes; those holes are replenished via base current $I_B$.
  5. Additional minor component: thermally generated minority carriers crossing B–C reverse junction (temperature-dependent).

• Current relations
  • Transport factor $\alpha \equiv \frac{I<em>C}{I</em>E}\approx0.99\text{–}0.999$
  • $I<em>B = I</em>E - I<em>C = (1-\alpha)I</em>E$
  • Current gain $\beta = \frac{I<em>C}{I</em>B}=\frac{\alpha}{1-\alpha}$ ⇒ $\beta\approx100$ when $\alpha=0.99$.
  • Hence: $I<em>C = \beta I</em>B$ (core design equation – BJT is a current-controlled current source).

Biasing & Negative Feedback Example

• Simple bias network with emitter resistor $R<em>E$: • $I</em>C=\beta I<em>B$ tends to change with $\beta$, temperature, etc. • Rise in $I</em>C$ raises $V<em>E = I</em>E R<em>E \approx I</em>C R<em>E$. • Since $V</em>{BE}\approx0.7\,\text{V}$, an increase in $V<em>E$ reduces $V</em>{BE}$, which in turn lowers $I<em>B$ → negative feedback that stabilises $I</em>C$.

Ebers–Moll (Ebermoore) Large-Signal Model

• Represents each junction as an ideal diode + dependent current source:
  • Forward component $I<em>F$ through E–B produces $\alpha</em>F I<em>F$ in collector branch. • Reverse component $I</em>R$ through B–C produces $\alpha<em>R I</em>R$ toward emitter.
  • Allows intuitive derivation of operating regions:
  – Forward Active: $I<em>F\neq0,\;I</em>R\approx0$ ⇒ $I<em>C \approx \alpha</em>F I<em>F$ (flat $I</em>C$ vs $V<em>{CE}$). – Saturation: both $I</em>F$ and $I<em>R$ present ⇒ opposing dependent sources reduce net $I</em>C$.
  – Cut-off: both $I<em>F$ and $I</em>R$ ≈ 0.

Output (Collector) Characteristics

• Plot: $I<em>C$ (vertical) vs $V</em>{CE}$ (horizontal) for several $I<em>B$ lines. • Flat region (until $V</em>{CE}\approx0.2\,\text{V}$): forward active.
  • Down-sloping region ($V<em>{CE}<0.2\,\text{V}$): saturation (both junctions forward). • Intersect at $V</em>{CE}=0$ with $I_C=0$ when both diodes off (cut-off).

• Early Effect (Base-Width Modulation)
  • Real curves exhibit slight positive slope even in active region.
  • Mechanism: increasing $V<em>{CE}$ enlarges B–C depletion width → narrows neutral base → lowers recombination → raises $I</em>C$.
  • Lines extrapolate to negative $V<em>{CE} = V</em>A$ (Early voltage).
  – $V<em>A$ large ⇒ slope small, better output resistance. – Empirical $V</em>A$ ranges from $50\,\text{V}$ to >$100\,\text{V}$ in modern BJTs.
  • Mathematically: $I<em>C = I</em>{C0}\left(1+\frac{V<em>{CE}}{V</em>A}\right)$.

Digital Switching with a BJT

• Saturation → “ON” state (closed switch).
  • $V_{CE(sat)} \approx 0.2\,\text{V}$; both junctions fwd.
• Cut-off → “OFF” state (open switch).
• Transistors in logic families (e.g.
  TTL) operate between these extremes rather than in forward-active.

Practical & Design Notes

• Temperature effects
  • $I<em>S$ roughly doubles every $10\,^{\circ}\text{C}$ → $V</em>{BE}$ drops ≈ $-2\,\text{mV}/^{\circ}\text{C}$.
  • $\beta$ also rises with temperature and with moderate $I_C$ before falling at high current due to high-level injection.

• Why beta variation matters
  • Amplifier bias networks must be built so gain & Q-point remain stable for $\beta$ spread (≈ 50–300 across devices & temperature).
  • Techniques: emitter degeneration ((R_E)), voltage-divider bias, feedback.

• Do not model a BJT as two discrete diodes – without a common, very thin base the interaction (dependent current source) is lost; the device would not amplify.

• Typical operating numbers
  • $V<em>{BE(on)} \approx 0.7\,\text{V}$ (Si, 25 °C). • $V</em>{BC(on)} \approx 0.5\,\text{V}$ when saturated.
  • $V<em>{CE(sat)} \approx 0.2\,\text{V}$. • $\beta$ (forward) 70 – 300 (device & bias dependent). • $V</em>A$ 50 – 150 V (large-signal output resistance $r<em>o = \frac{V</em>A+V<em>{CE}}{I</em>C}$).

Connections to Earlier Material & Real-World Relevance

• Same exponential diode law underpins both rectifiers and transistor junctions.
• Zener regulation principle forms the reference in nearly every linear voltage regulator IC.
• BJT forward-active behaviour (current-controlled current source) is the heart of classic op-amps, analog mixers, differential pairs.
• Saturation & cut-off underpin TTL/DTL logic families and motor driver switches.
• Early effect & negative feedback concepts foreshadow transistor small-signal models and amplifier design (next lectures).

Conceptual Take-aways & Ethical/Practical Aspects

• Proper heat-sinking or current-limiting is mandatory to prevent uncontrolled breakdown damage (design for safety, reliability).
• Understanding carrier flow clarifies why device doping gradients and geometry cannot be ignored – crucial for future IC designers.
• Accurate models (Ebers–Moll, Gummel-Poon) form the ethical basis of honest simulation/specification – over-simplification can yield unsafe circuits.