Midterm Review
COSC 3332 Computer Organization and Architecture
Overview
- Course Title: COSC 3332 Computer Organization and Architecture
- Department: Computer Science
- Instructor: Dr. Qi Zhu
Midterm Test Details
- Date: 3/13/26 12:01 am - 3/15/26 11:59 pm
- Length: Any 150 minutes
- Format: Open book, open notes, online test
- Instructions: No copying and no talking; recommend bringing a calculator
Midterm Exam Content Breakdown (Total: 104 points, 4 extra)
Part 1: True or False
- Total Questions: 10
- Points Each: 2
- Total Points: 20
Part 2: Multiple Choice
- Total Questions: 25
- Points Each: 2
- Total Points: 50
Part 3: Matching Questions
- Points: 10
Part 4: Simple Questions
- Points: 24
Additional Topics:
- Truth Table/Boolean Algebra/Logic Diagrams (10 pts)
- MARIE Assembly (14 pts)
Grades and Solutions: Solutions will be posted after 3/22.
Chapter 1: Computer Systems
Main Components of a Computer
- Processor: Interprets and executes programs.
- Memory: Stores both data and programs.
- Input/Output System: Mechanism for transferring data to/from external environments.
Computer Development: Historical context and evolution of computers.
Computer Level Hierarchy: Virtual machine layers as abstractions of lower levels, each executing specific instructions.
Von Neumann Model:
- Instruction Processing Components:
- CPU (Central Processing Unit)
- Main Memory
- I/O System
- Sequences: Instruction Fetch, Decode, Execute, Store results.
- Von Neumann Bottleneck: Single data path limits performance.
- Instruction Processing Components:
Non-Von Neumann Models: Includes additional processors (e.g., IBM Blue Gene with over 1 million processors) and various architectures (genetic, quantum, dataflow systems).
Chapter 2: Number Systems and Binary Representation
Radix Systems:
- Decimal (Base 10): Example: 58036 = 5×10^4 + 8×10^3 + 0×10^2 + 3×10^1 + 6×10^0.
- Binary (Base 2): 26 = 1×2^4 + 1×2^3 + 0×2^2 + 1×2^1 + 0×2^0.
Binary Representation:
- Bits: The binary system consists of bits, defined as electronic charge states.
Range for Unsigned Integers: Depends on the number of bits in a cell; all 0's = 0, all 1's = maximum value of the representation.
- Example (7-bit cell): 0000000 (binary) = 0 (decimal); 1111111 (binary) = 127 (decimal).
Two’s Complement Representation: Used for negative integers.
- Sign Bit: First bit indicates the sign; 0 = positive, 1 = negative.
- Conversion: To find absolute value, invert bits and add 1 to the least significant bit (LSB).
Overflow Bit: Indicates exceeding the range capacity for both unsigned (C bit) and signed (V bit) integers.
Logical and Arithmetic Operations:
- Operations include AND, OR, NOT (logical), and ASL, ASR, NEG (arithmetic).
- Truth tables for AND and OR operations.
Hexadecimal System: Base 16 representation, linked closely with binary coding.
Floating Point Representation: Involves storage for fractional numbers with 1-bit sign, exponent, and significand.
- Biased Exponent: A number that is subtracted from the exponent for calculating true values.
Character Representation: Conversion schemes (ASCII, EBCDIC, Unicode) to transform human-readable data into computer-readable formats.
Error Detection and Correction:
- Modulo 2 Arithmetic: Similar to clock arithmetic.
- CRC Algorithm and common error-correcting codes like Hamming and Reed-Solomon.
Chapter 3: Boolean Algebra and Digital Logic
Boolean Algebra: A system manipulating binary variables (true/false, on/off, 1/0).
- Common Boolean operations include AND, OR, NOT.
Truth Tables: Describe input/output relations of logical operations.
Logic Gates: Basic components that implement Boolean functions, including AND, OR, NOT, NAND, NOR, XOR gates.
Combinational Circuits: Design that produces outputs exclusively based on current inputs, not on past states.
Sequential Circuits: Systems that remember states, evidenced by flip-flops that store information.
Designing Circuits: Involves analysis (input-output relations) and synthesis (creating logic diagrams from truth tables).
Chapter 4: MARIE Architecture
Introduction: Displays principles of a simple computer architecture.
CPU Basics: Main parts are the datapath and control unit, which fetch, decode, and execute instructions.
Bus: Data, control, address lines used for communication between components.
Clock Cycle: Synchronizes the operations; must manage propagation delay effectively.
Memory and Addressing: Structured as a linear array of addressable storage cells.
Interrupts: Allow CPU to handle high-priority events, potentially altering normal execution flow.
MARIE Characteristics: Features include binary data, fixed word lengths, a simple memory architecture, and a straightforward instruction set consisting of 13 instructions.
Instruction Set Architecture: Defines the operations that the CPU can perform, serving as a bridge between hardware and software.
Fetch-Decode-Execute Cycle: Crucial for program execution, involving instruction retrieval, decoding, and executing steps.
Assemblers and Indirect Addressing: Translate human-readable mnemonics into machine language; indirect addressing used for referencing operands.
Control Unit Functionality: Can be hardwired (fast) or microprogrammed (more flexible); both methods involve control signals for ALU operations.
Real-World Architectural Examples: Covers CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer) architectures.