MOS Transistor Fundamentals and Operating Characteristics

Acronym Definition: MOS stands for Metal Oxide Semiconductor, referring to the three layers comprising the basic structure (Metal gate, Oxide insulator, and Semiconductor substrate).
MOS Layer Functions:
- Metal Gate: The top conductive layer used to apply voltage to the device.
- SiO₂ (Silicon Dioxide) Layer: Acts as a high-quality insulator between the gate and the substrate.
- Substrate: The bulk semiconductor material upon which the device is built. In a basic NMOS structure, the substrate is commonly made of p-type silicon.
MOSFET Terminals: The four terminals used to control or connect the device are the Gate, Drain, Source, and Substrate (also known as the Body).
- Gate: The terminal used specifically to control the conducting channel.
- Source and Drain (NMOS): Typically formed by $n^+$ regions (heavily doped n-type silicon).
Control Mechanism: The MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled device. Unlike a bipolar transistor, the gate current is ideally zero, and the voltage at the gate governs the behavior of the channel.

Accumulation Mode:
- Triggered by applying a negative gate voltage to a p-type substrate.
- Physical Mechanism: Majority carriers (holes) are attracted to the surface of the semiconductor, directly under the oxide layer.
Depletion Mode:
- Majority carriers (holes in a p-type substrate) are repelled from the surface by an applied positive gate voltage.
- A depletion region consisting of immobile ion charges forms near the oxide-semiconductor interface.
Inversion Mode and Layer Formation:
- Occurs when the applied gate voltage is sufficiently positive to attract minority carriers (electrons in p-type) to the surface.
- The surface region undergoes a change in carrier type, becoming n-type; this resultant region is called the inversion layer.
- In an NMOS transistor, this conducting channel is formed specifically by electrons.

Threshold Voltage ( $V_T$ ): Represents the minimum gate-to-source voltage required to create an inversion layer and allow conduction between the source and drain.
Enhancement-mode MOSFET: A type of MOSFET that has no conducting channel when the gate bias is zero ( $V_{GS} = 0$ ). It requires a gate voltage greater than $V_T$ to "enhance" or form the channel.
Operating Regions:
- Cutoff Region: Defined by the condition $V_{GS} < V_T$ . The transistor is off, and no channel exists.
- Linear (Triode) Region: Defined by the condition $V_{GS} > V_T$ and low $V_{DS}$ . In this region, a channel is formed and the drain current $I_D$ is approximately proportional to the drain-to-source voltage $V_{DS}$ . The MOSFET behaves like a voltage-controlled resistor.
- Saturation Region: The MOSFET enters this region after the channel "pinches off." In saturation, the drain current ideally depends mainly on the gate-to-source voltage $V_{GS}$ and is relatively independent of $V_{DS}$ .
Pinch-off Condition:
- Occurs when the drain-to-source voltage reaches the overdrive voltage: $V_{DS} = V_{GS} - V_T$ .
- After pinch-off, most excess voltage is absorbed by the depleted region near the drain.

Body Effect:
- This effect causes the threshold voltage $V_T$ to increase as the source-to-bulk voltage ( $V_{SB}$ ) increases.
- The body effect coefficient is represented by the Greek letter $\gamma$ (gamma).
- In an NMOS transistor, the substrate bias coefficient $\gamma$ is usually positive.
Channel-Length Modulation:
- Represented by the parameter $\lambda$ (lambda).
- Physical effect: In the saturation region, increasing $V_{DS}$ causes the effective channel length to shorten, slightly increasing the drain current $I_D$ .
Capacitance Parameters:
- $C_{ox}$ : Represents the oxide capacitance per unit area.
Gradual Channel Approximation (GCA):
- A standard modeling assumption where the transverse electric field ( $E_y$ ) is assumed to be much greater than the longitudinal electric field ( $E_x$ ) ( $E_y > E_x$ ).

Short-Channel Effects: These occur when the channel length becomes comparable to the depletion width of the source and drain junctions.
Velocity Saturation: Occurs when carriers (electrons/holes) in the channel reach their maximum drift velocity due to high longitudinal electric fields, limiting current increase.
Threshold Voltage Scaling:
- Short-Channel Devices: Reducing channel length generally causes $V_T$ to decrease.
- Charge Sharing: The primary mechanism causing threshold voltage reduction in short-channel devices.
- Narrow-Channel Effect: Causes the threshold voltage $V_T$ to increase (contrasted with the short-channel effect).
DIBL (Drain-Induced Barrier Lowering): A short-channel effect where the drain bias influences the source-side potential barrier, reducing the threshold voltage.
Subthreshold Conduction: Current that flows when the gate-to-source voltage is below the threshold voltage ( $V_{GS} < V_T$ ).
Hot-Carrier Effect: Caused by high electric fields that give carriers enough energy to inject into the gate oxide, potentially degrading device performance.

Full Scaling (Constant-Field Scaling):
- Dimensions and voltages are scaled by a factor $S$ .
- Goal: To keep the electric field within the device approximately constant.
- Device dimensions are reduced by a factor of $S$ .
Constant-Voltage Scaling:
- Dimensions are reduced while the supply voltage remains unchanged.
- This leads to higher electric fields within the device.

Impact on Performance: Parasitic capacitances are the primary factors influencing switching delay and propagation delay.
Capacitance in Different Modes:
- Cutoff Mode: Gate-to-source ( $C_{gs}$ ) and gate-to-drain ( $C_{gd}$ ) capacitances are approximately zero ( $C_{gs} = C_{gd} = 0$ ).
- Saturation Mode: Gate-to-drain capacitance is small/zero. Gate-to-source capacitance is approximately: $C_{gs} \approx \frac{2}{3} C_{ox}WL$
Overlap Capacitance: Exists due to the physical overlap of the gate electrode with the source and drain regions.
Junction Capacitance: Associated with the depletion region of the pn junctions (Source-Body and Drain-Body). It is voltage-dependent.
Channel Length Geometry:
- The actual (effective) channel length is given by: $L = L_M - 2L_D$ (Where $L_M$ is the mask length and $L_D$ is the lateral diffusion/overlap distance).