Processors and the FDE cycle NOTES

Processor and Its Components

• Processor Role: Central component of a computer that performs calculations and tasks.

• Major Components:

• Arithmetic Logic Unit (ALU): Executes arithmetic and logical operations.

• Control Unit: Manages operations of the CPU, memory, and peripherals.

• Clock: Provides timing for process synchronization through clock pulses.

• Registers:

  • General-Purpose Registers: Temporary storage for binary values used in computations.

  • Dedicated Registers: Specialized registers with unique functions:

    • Program Counter (PC): Holds address of the next instruction.

    • Current Instruction Register (CIR): Stores the instruction being executed.

    • Memory Address Register (MAR): Holds the address of data to be fetched or stored.

    • Memory Buffer Register (MDR): Temporarily holds data to be read/written.

    • Status Register (SR): Contains flags that indicate the state of the processor.

Fetch-Execute Cycle

• Overview: Fundamental process for executing machine code programs. Steps include:

• Fetch: Retrieving the next instruction from memory.

  • PC is copied to MAR.

  • MAR accesses memory via address bus.

  • PC increments to the next instruction.

  • Control Unit (CU) initiates a memory read into MDR.

  • Contents of MDR are sent to CIR.

• Decode: CU interprets the instruction in CIR.

  • Signals the relevant components for instruction execution.

• Execute: Carrying out the directive of the instruction.

  • ALU processes the data.

  • Updates registers and status register as needed.

Processor Structure

• ALU Functions:

• Performs calculations (e.g., addition, logical operations).

• Control Unit Functions:

• Coordinates actions among CPU, memory, and peripherals.

• Clock:

• Drives the timing of operations in the CPU.

• Internal Buses and Logic Gates:

• Facilitate communication within the CPU.

Detailed Register Functions

• Program Counter (PC): Progresses through instructions by holding addresses.

• Current Instruction Register (CIR): Processes the instruction currently being executed.

• General Purpose Registers: Aid in temporary storage during computations.

• Memory Address Register (MAR):

• Interface between CPU and memory for instruction fetching and data access.

• Memory Buffer Register (MDR):

• Stores data coming to/from memory before being processed or written.

• Status Register (SR):

• Flags indicate processor conditions (e.g., overflow).

Handling Interrupts

• Interrupt Basics: Signals from devices or programs that pause current processes.

• Types of Interrupts: Include hardware faults or impending power loss.

• Prioritization determines which interrupt to handle first.

• Control Bus Usage: Interrupt signals are relayed through the control bus.

• Interrupt Register: Indicates types of interrupts received.

• Environment Storage: Saving state information (register values) enables resuming tasks post-interrupt.

Interrupt Service Routine (ISR)

• ISR Function: Code executed when an interrupt occurs.

• Interrupt Vectors: Act as addresses guiding which ISR to run.

  • Each interrupt is assigned a unique number for identification.

• Vector Table: Centralizes ISR addresses for efficient retrieval during interrupts.

• Memory Flexibility: ISRs can be positioned anywhere in memory, enhancing adaptability.