Introduction to Electronics Engineering Module I Semiconductor Diodes and Applications

Course Overview & Reference Materials

  • Prescribed Textbooks:

    • R. L. Boylestad and L. Nashelsky, Electronic Devices and Circuit Theory, 11th Ed., Pearson Education, 2013.

    • M. Morris Mano and Michael D. Ciletti, Digital Electronics, 4th Ed., Pearson Education, 2006.

  • Reference Books:

    • David A. Bell, Electronic Devices and Circuits, 5th Ed., Oxford University Press, 2008.

    • Millman & Halkias, Electronics Devices and Circuits, 2nd Ed., McGraw Hill, 2010.

  • E-Resources & Online Platforms:

    • Arduino Learning Portal: https://docs.arduino.cc/learn/

    • Wokwi Arduino Simulator: https://wokwi.com/arduino/

    • NPTEL Course Material: https://nptel.ac.in/courses/122/106/122106025

    • IIT Kharagpur Virtual Labs: http://vlabs.iitkgp.ac.in/be/

Atomic Structure & Energy Band Theory

  • Energy States in Isolated Atoms:

    • Electrons orbit the atomic nucleus at specific, discrete energy levels.

    • The farther an electron is situated from the nucleus, the higher its energy state.

    • Any electron that completely breaks free from its parent atom possesses a higher energy state than any electron remaining bound within the atomic structure.

  • Energy Bands in Solid Materials:

    • When individual atoms coalesce into a solid lattice, discrete energy levels merge into continuous energy bands.

    • Valence Band: The highest occupied energy band containing valence electrons that are bound to the atomic structure.

    • Conduction Band: The band of energy levels above the valence band where electrons are free to move throughout the material and establish electrical conduction.

    • Energy Gap (EgE_g): The forbidden energy zone separating the valence band and the conduction band where no electron states can exist.

Energy levels and band structure of materials
  • Classification of Materials by Band Structure:

    • Insulators:

      • Possess a very wide energy band gap (Eg>5 eVE_g > 5\text{ eV}).

      • Valence electrons are extremely tightly bound to the atomic structure.

      • Thermal energy at room temperature is completely insufficient to lift valence electrons across the gap into the conduction band.

    • Semiconductors:

      • Possess a relatively narrow energy band gap (Eg is modestE_g \text{ is modest}).

      • Specific energy gaps at room temperature (T=300 KT = 300\text{ K}):

        • Germanium (Ge\text{Ge}): Eg=0.67 eVE_g = 0.67\text{ eV}

        • Silicon (Si\text{Si}): Eg=1.1 eVE_g = 1.1\text{ eV}

        • Gallium Arsenide (GaAs\text{GaAs}): Eg=1.43 eVE_g = 1.43\text{ eV}

      • At absolute zero (0 K0\text{ K}), semiconductors act as perfect insulators. At room temperature, thermal energy excites a small number of electrons across EgE_g into the conduction band.

    • Conductors:

      • The valence band and conduction band physically overlap (Eg is non-existentE_g \text{ is non-existent}).

      • An abundance of free electrons is readily available to conduct electric current under any applied electric field.

Intrinsic and Extrinsic Semiconductors

  • Intrinsic Semiconductors:

    • Pure, uncontaminated single-element or compound semiconductor crystals.

    • Conduction occurs purely due to naturally thermally generated charge carriers, termed intrinsic carriers (nin_i).

    • Negative Temperature Coefficient of Resistance: As the temperature of an intrinsic semiconductor increases, thermal energy breaks more covalent bonds, dramatically increasing charge carriers and reducing electrical resistance.

  • Covalent Bonding Structure:

    • Silicon (Si\text{Si}) & Germanium (Ge\text{Ge}): Tetravalent elements containing four valence electrons in their outermost shell. They share valence electrons with four neighboring atoms to form stable covalent bonds.

    • Gallium Arsenide (GaAs\text{GaAs}): Compound semiconductor constructed from Gallium (Group III, 3 valence electrons) and Arsenic (Group V, 5 valence electrons), yielding an average of 4 valence electrons per atom across the covalent crystal structure.

  • Comparison of Intrinsic Material Properties at Room Temperature:

    • Intrinsic Carrier Concentration (ni per cm3n_i\text{ per cm}^3):

      • GaAs:1.7×106 cm−3\text{GaAs}: 1.7 \times 10^6\text{ cm}^{-3}

      • Si:1.5×1010 cm−3\text{Si}: 1.5 \times 10^{10}\text{ cm}^{-3}

      • Ge:2.5×1013 cm−3\text{Ge}: 2.5 \times 10^{13}\text{ cm}^{-3}

    • Relative Mobility Factor (μncm2/V⋅s\frac{\mu_n}{\text{cm}^2/\text{V}\cdot\text{s}}):

      • Si:1500 cm2/V⋅s\text{Si}: 1500\text{ cm}^2/\text{V}\cdot\text{s}

      • Ge:3900 cm2/V⋅s\text{Ge}: 3900\text{ cm}^2/\text{V}\cdot\text{s}

      • GaAs:8500 cm2/V⋅s\text{GaAs}: 8500\text{ cm}^2/\text{V}\cdot\text{s}

  • Application Trade-offs Based on Bandgap Energy:

    • Narrow Bandgap Materials (Ge\text{Ge}, Eg=0.67 eVE_g = 0.67\text{ eV}): Highly sensitive to thermal variations. Thermal energy easily pushes electrons into the conduction band, making Germanium useful for photodetectors and heat-sensitive security systems.

    • Wide Bandgap Materials (GaAs\text{GaAs}, Eg=1.43 eVE_g = 1.43\text{ eV}): Recombination of free electrons and holes across the wide energy gap releases substantial energy in the form of electromagnetic radiation (visible or infrared light). Consequently, Gallium Arsenide is widely used in Light Emitting Diodes (LEDs).

  • Extrinsic Semiconductors and Doping:

    • Doping: The controlled process of introducing minute amounts of specific impurity atoms into the semiconductor crystal lattice to modify electrical conductivity.

    • Doping Ratio: Typical dosage levels are approximately 1 impurity atom per 10710^7 (10 million10\text{ million}) semiconductor atoms.

Antimony impurity in n-type silicon lattice
  • n-Type Material:

    • Created by doping pure semiconductor with pentavalent impurity elements (Group V) such as Antimony (Sb\text{Sb}), Arsenic (As\text{As}), or Phosphorus (P\text{P}).

    • These impurities are designated as donor atoms because four of their valence electrons form covalent bonds with adjacent silicon atoms, leaving a loosely bound fifth electron.

    • When the fifth electron absorbs thermal energy and enters the conduction band, it leaves behind an immobile, positively charged ion designated as a donor ion.

    • A discrete donor energy level is introduced into the forbidden gap just below the conduction band.

    • Majority Carriers: Free electrons.

    • Minority Carriers: Thermally generated holes.

Boron impurity in p-type silicon lattice
  • p-Type Material:

    • Created by doping pure semiconductor with trivalent impurity elements (Group III) such as Boron (B\text{B}), Gallium (Ga\text{Ga}), or Indium (In\text{In}).

    • These impurities are designated as acceptor atoms because they possess only three valence electrons, creating a vacant electron position or hole in the covalent bond structure.

    • When a hole accepts an electron from a neighboring bond, the acceptor atom acquires a net negative charge, becoming an immobile acceptor ion.

    • A discrete acceptor energy level is introduced into the forbidden gap just above the valence band.

    • Majority Carriers: Holes.

    • Minority Carriers: Thermally generated free electrons.

p-n Junction Dynamics & Operating Biases

  • Formation of the Depletion Region:

    • Joining a p-type semiconductor material to an n-type semiconductor material forms a p-n junction.

    • At the interface, excess conduction-band electrons from the n-side diffuse across the junction into the p-side to recombine with valence-band holes.

    • This electron migration uncovers fixed positive donor ions on the n-side and fixed negative acceptor ions on the p-side.

    • The region around the junction stripped of free mobile charge carriers is defined as the depletion region.

    • The fixed immobile charges establish an internal electric field that halts further net diffusion of majority carriers.

p-n junction depletion region
  • Charge Carrier Currents Across Junction:

    • Majority (Diffusion) Current (ImajorityI_{\text{majority}}): Current resulting from majority charge carriers possessing sufficient energy to overcome the built-in junction potential gradient. It depends directly on applied bias voltage.

    • Minority (Drift) Current / Reverse Saturation Current (IsI_s): Current resulting from minority charge carriers being swept across the depletion region by the built-in electric field. It is largely independent of applied reverse bias voltage but highly sensitive to temperature.

  • Diode Operating Conditions:

    • No Bias (VD=0 VV_D = 0\text{ V}):

      • No external voltage is applied across terminals.

      • Net diode current ID=0 mAI_D = 0\text{ mA}.

      • A stable barrier potential and modest depletion width exist where majority diffusion current precisely balances minority drift current (Imajority=IsI_{\text{majority}} = I_s).

    • Reverse Bias (VD<0 VV_D < 0\text{ V}):

      • External positive terminal is connected to the n-type material and negative terminal to the p-type material.

      • Free electrons in the n-region and holes in the p-region are pulled away from the junction toward external power supply terminals.

      • The depletion region widens significantly.

      • Majority current is eliminated (Imajority=0 AI_{\text{majority}} = 0\text{ A}).

      • Only the reverse saturation current IsI_s flows due to minority carriers drifting across the junction (ID=−IsI_D = -I_s).

    • Forward Bias (VD>0 VV_D > 0\text{ V}):

      • External positive terminal is connected to the p-type material and negative terminal to the n-type material.

      • Applied potential pushes majority carriers (holes and electrons) toward the junction, narrowing the depletion region.

      • When applied voltage exceeds the internal barrier potential, majority carriers cross the junction in large numbers, establishing heavy forward current.

  • Threshold / Knee Voltages (VKV_K):

    • Germanium (Ge\text{Ge}): VK≈0.3 VV_K \approx 0.3\text{ V}

    • Silicon (Si\text{Si}): VK≈0.7 VV_K \approx 0.7\text{ V}

    • Gallium Arsenide (GaAs\text{GaAs}): VK≈1.2 VV_K \approx 1.2\text{ V}

Mathematical Analysis & Shockley Equation

  • Shockley Equation for Forward and Reverse Bias Regions:     \n    I_D = I_s \left( e^{\frac{V_D}{n V_T}} - 1 \right)\n         where:

    • IDI_D = Net diode current in Amperes (A\text{A})

    • IsI_s = Reverse saturation current in Amperes (A\text{A})

    • VDV_D = Applied voltage across diode terminals in Volts (V\text{V})

    • nn = Ideality factor (1≤n≤21 \le n \le 2; n=1n = 1 is assumed unless otherwise specified)

    • VTV_T = Thermal voltage in Volts (V\text{V})

  • Thermal Voltage Equation:     \n    V_T = \frac{k T_K}{q}\n         where:

    • kk = Boltzmann's constant = 1.38×10−23 J/K1.38 \times 10^{-23}\text{ J/K}

    • TKT_K = Absolute temperature in Kelvins = 273+T(∘C)273 + T(^\circ\text{C})

    • qq = Magnitude of electronic charge = 1.6×10−19 C1.6 \times 10^{-19}\text{ C}

  • Calculation of Thermal Voltage at Room Temperature (27∘C27^\circ\text{C}):

    • Given T=27∘CT = 27^\circ\text{C}, TK=273+27=300 KT_K = 273 + 27 = 300\text{ K}.     \n    V_T = \frac{(1.38 \times 10^{-23}\text{ J/K})(300\text{ K})}{1.6 \times 10^{-19}\text{ C}} = \frac{4.14 \times 10^{-21}}{1.6 \times 10^{-19}} = 0.025875\text{ V} \approx 0.0258\text{ V} = 25.8\text{ mV}\n    

  • Detailed Worked Problems:

    • Problem 1: Determine the diode current at 20∘C20^\circ\text{C} for a silicon diode with Is=50 nAI_s = 50\text{ nA} and an applied forward bias of VD=0.6 VV_D = 0.6\text{ V}. (Assume n=2n = 2).

      • Step 1: Compute absolute temperature and thermal voltage:             TK=273+20=293 KT_K = 273 + 20 = 293\text{ K}             VT=(1.38×10−23)(293)1.6×10−19=0.02527 V≈0.0252 VV_T = \frac{(1.38 \times 10^{-23})(293)}{1.6 \times 10^{-19}} = 0.02527\text{ V} \approx 0.0252\text{ V}

      • Step 2: Apply Shockley Equation:             ID=(50×10−9 A)(e0.62×0.0252−1)=(50×10−9)(e11.9048−1)I_D = (50 \times 10^{-9}\text{ A}) \left( e^{\frac{0.6}{2 \times 0.0252}} - 1 \right) = (50 \times 10^{-9}) \left( e^{11.9048} - 1 \right)             e11.9048≈147970e^{11.9048} \approx 147970             ID=(50×10−9)×147969≈7.398×10−3 A=7.217 mAI_D = (50 \times 10^{-9}) \times 147969 \approx 7.398 \times 10^{-3}\text{ A} = 7.217\text{ mA}

    • Problem 2: For a diode at 20∘C20^\circ\text{C} with Is=40 nAI_s = 40\text{ nA}, n=2n = 2, calculate IDI_D when applied forward voltage is VD=0.5 VV_D = 0.5\text{ V}.

      • Step 1: Thermal voltage at 20∘C20^\circ\text{C} is VT=0.0252 VV_T = 0.0252\text{ V}.

      • Step 2: Compute diode current:             ID=(40×10−9 A)(e0.52×0.0252−1)=(40×10−9)(e9.9206−1)I_D = (40 \times 10^{-9}\text{ A}) \left( e^{\frac{0.5}{2 \times 0.0252}} - 1 \right) = (40 \times 10^{-9}) \left( e^{9.9206} - 1 \right)             e9.9206≈20345e^{9.9206} \approx 20345             ID=(40×10−9)×20344=0.8138 mA≈0.8132 mAI_D = (40 \times 10^{-9}) \times 20344 = 0.8138\text{ mA} \approx 0.8132\text{ mA}

Diode Characteristics, Temperature Effects & Breakdown

Diode V-I Characteristics
  • Temperature Effects on Diode Curves:

    • As ambient temperature increases, thermal energy supplied to the crystal lattice increases.

    • Forward Bias Impact: Required forward threshold voltage decreases with increasing temperature. The forward V-I curve shifts to the left at a rate of approximately −2.5 mV/∘C-2.5\text{ mV}/^\circ\text{C}.

    • Reverse Bias Impact: Reverse saturation current IsI_s increases dramatically with temperature. Typically, IsI_s doubles for every 10∘C10^\circ\text{C} rise in temperature.

    • Breakdown Impact: Maximum reverse breakdown potential increases with temperature.

    • Material Sensitivity: Germanium diodes exhibit far greater sensitivity to temperature fluctuations than Silicon or Gallium Arsenide diodes.

Temperature dependence of silicon diode V-I curve
  • Breakdown Region:

    • Occurs when applied reverse bias potential reaches the breakdown voltage (VBVV_{BV}).

    • Excessive electric field across the depletion region causes reverse current to surge sharply.

    • Peak Inverse Voltage (PIV) / Peak Reverse Voltage (PRV): The maximum allowable reverse bias voltage that can be applied across a diode without entering the breakdown region.

  • Zener Diode Characteristics:

    • Heavily doped silicon p-n junction diodes designed to operate continuously and safely within the reverse breakdown region.

    • Zener Mechanism: Heavily doped diodes exhibit sharp reverse breakdown at relatively low voltages (<6 V< 6\text{ V}).

    • Avalanche Mechanism: Lightly doped diodes exhibit breakdown at higher voltages (>6 V> 6\text{ V}).

    • When operating in reverse breakdown above its minimum knee current, a Zener diode maintains an essentially constant terminal voltage equal to its nominal Zener voltage (VZV_Z), regardless of current flow.

    • Used extensively as constant voltage reference elements and voltage regulators.

    • Commercial ratings range from VZ=1.8 VV_Z = 1.8\text{ V} to 200 V200\text{ V} with power dissipation ratings from 0.25 W0.25\text{ W} to 50 W50\text{ W} (e.g., 1N5333 series rated at 5 W5\text{ W} with Zener voltages from 3.3 V3.3\text{ V} to 24 V24\text{ V}).

Diode Equivalent Circuit Models & Specification Sheets

Diode Equivalent Models
  • Piecewise-Linear Model:

    • Components: Battery representing knee voltage VKV_K (0.7 V0.7\text{ V} for Si), average forward resistance ravr_{\text{av}} (e.g., 10 Ω10\ \Omega), and an ideal diode switch.

    • Conduction Condition: VD≥VKV_D \ge V_K. Slope of forward curve equals 1rav\frac{1}{r_{\text{av}}}.

  • Simplified Model:

    • Components: Knee voltage battery VKV_K (0.7 V0.7\text{ V} for Si) in series with an ideal diode switch.

    • Validity Condition: Applied when external network series resistance is much greater than average forward resistance (Rnetwork≫ravR_{\text{network}} \gg r_{\text{av}}). Resistance ravr_{\text{av}} is approximated as 0 Ω0\ \Omega

  • Ideal Device Model:

    • Components: Simple ideal switch.

    • Forward Bias: Voltage across ideal diode is 0 V0\text{ V}, forward resistance RF=0 ΩR_F = 0\ \Omega (short-circuit equivalent).

    • Reverse Bias: Current through ideal diode is 0 A0\text{ A}, reverse resistance RR=∞ ΩR_R = \infty\ \Omega (open-circuit equivalent).

    • Validity Condition: Applied when network resistance Rnetwork≫ravR_{\text{network}} \gg r_{\text{av}} and circuit voltage levels are significantly higher than barrier potential (Enetwork≫VKE_{\text{network}} \gg V_K).

  • Diode Specification Sheet Interpretation (BAY73 Example Parameters):

    • Forward Voltage (VFV_F) Ranges at 25∘C25^\circ\text{C}:

      • At IF=1.0 mAI_F = 1.0\text{ mA}: VF=0.60 V to 0.68 VV_F = 0.60\text{ V to } 0.68\text{ V}

      • At IF=5.0 mAI_F = 5.0\text{ mA}: VF=0.67 V to 0.75 VV_F = 0.67\text{ V to } 0.75\text{ V}

      • At IF=10 mAI_F = 10\text{ mA}: VF=0.69 V to 0.80 VV_F = 0.69\text{ V to } 0.80\text{ V}

      • At IF=50 mAI_F = 50\text{ mA}: VF=0.78 V to 0.88 VV_F = 0.78\text{ V to } 0.88\text{ V}

      • At IF=100 mAI_F = 100\text{ mA}: VF=0.81 V to 0.94 VV_F = 0.81\text{ V to } 0.94\text{ V}

      • At IF=200 mAI_F = 200\text{ mA}: VF=0.85 V to 1.00 VV_F = 0.85\text{ V to } 1.00\text{ V}

      • Conclusion: 0.7 V0.7\text{ V} represents a highly accurate average forward bias approximation for typical practical operating ranges.

    • Reverse Current (IRI_R) Characteristics:

      • At VR=20 V,TA=25∘CV_R = 20\text{ V}, T_A = 25^\circ\text{C}: Maximum IR=0.2 nAI_R = 0.2\text{ nA}

      • At VR=100 V,TA=25∘CV_R = 100\text{ V}, T_A = 25^\circ\text{C}: Maximum IR=0.5 nAI_R = 0.5\text{ nA} (5-fold voltage increase yields 2.5-fold reverse current increase).

      • At VR=20 V,TA=125∘CV_R = 20\text{ V}, T_A = 125^\circ\text{C}: Maximum IR=500 nAI_R = 500\text{ nA}

      • At VR=100 V,TA=125∘CV_R = 100\text{ V}, T_A = 125^\circ\text{C}: Maximum IR=1.0 μAI_R = 1.0\ \mu\text{A}

    • Breakdown Voltage (BVBV): Minimum 125 V125\text{ V} at test condition IR=100 μAI_R = 100\ \mu\text{A}.

Series DC Diode Circuit Analysis

  • General Circuit Analysis Steps:

    1. Determine the state of the diode (ON or OFF) by inspecting the polarity of applied source voltage relative to anode/cathode terminals.

    2. Substitute the appropriate equivalent model for the determined state.

    3. Apply Kirchhoff's Voltage Law (KVL) and Ohm's Law to calculate circuit currents and node voltages.

  • Worked Numerical Examples:

    • Example 2.4: Series circuit driven by E=8 VE = 8\text{ V} DC source through a Silicon diode (VK=0.7 VV_K = 0.7\text{ V}) and resistor R=2.2 kΩR = 2.2\text{ k}\Omega

      • State: Applied voltage attempts to push current clockwise (matching diode symbol arrow); E=8 V>0.7 VE = 8\text{ V} > 0.7\text{ V}, so diode is ON.

      • Diode Voltage: VD=0.7 VV_D = 0.7\text{ V}

      • Resistor Voltage: VR=E−VD=8 V−0.7 V=7.3 VV_R = E - V_D = 8\text{ V} - 0.7\text{ V} = 7.3\text{ V}

      • Circuit Current: ID=IR=VRR=7.3 V2.2 kΩ=3.32 mAI_D = I_R = \frac{V_R}{R} = \frac{7.3\text{ V}}{2.2\text{ k}\Omega} = 3.32\text{ mA}

    • Example 2.5: Repeat Example 2.4 with the Silicon diode reversed.

      • State: Current direction is opposite to symbol arrow; diode is OFF (open circuit equivalent).

      • Circuit Current: ID=0 AI_D = 0\text{ A}

      • Resistor Voltage: VR=IRR=(0 A)(2.2 kΩ)=0 VV_R = I_R R = (0\text{ A})(2.2\text{ k}\Omega) = 0\text{ V}

      • Diode Voltage (Applying KVL): E−VD−VR=0  ⟹  VD=E−VR=8 V−0 V=8 VE - V_D - V_R = 0 \implies V_D = E - V_R = 8\text{ V} - 0\text{ V} = 8\text{ V}

    • Example 2.6: Series circuit driven by E=0.5 VE = 0.5\text{ V} DC source through a Silicon diode and resistor R=1.2 kΩR = 1.2\text{ k}\Omega

      • State: Applied pressure matches diode arrow, but source potential E=0.5 VE = 0.5\text{ V} is insufficient to overcome knee potential VK=0.7 VV_K = 0.7\text{ V}. Diode remains OFF (open circuit).

      • Current: ID=0 AI_D = 0\text{ A}

      • Resistor Voltage: VR=(0 A)(1.2 kΩ)=0 VV_R = (0\text{ A})(1.2\text{ k}\Omega) = 0\text{ V}

      • Diode Voltage: VD=E=0.5 VV_D = E = 0.5\text{ V}

    • Example 2.7: Series circuit with E=+12 VE = +12\text{ V}, connected to a Silicon diode (VK1=0.7 VV_{K1} = 0.7\text{ V}), a Red LED (VK2=1.8 VV_{K2} = 1.8\text{ V}), and a resistor R=680 ΩR = 680\ \Omega to ground.

      • State: Applied potential E=12 V>(0.7 V+1.8 V)=2.5 VE = 12\text{ V} > (0.7\text{ V} + 1.8\text{ V}) = 2.5\text{ V}. Both diodes are ON.

      • Output Voltage across RR: Vo=E−VK1−VK2=12 V−0.7 V−1.8 V=9.5 VV_o = E - V_{K1} - V_{K2} = 12\text{ V} - 0.7\text{ V} - 1.8\text{ V} = 9.5\text{ V}

      • Diode Current: ID=IR=VoR=9.5 V680 Ω=13.97 mAI_D = I_R = \frac{V_o}{R} = \frac{9.5\text{ V}}{680\ \Omega} = 13.97\text{ mA}

    • Example 2.8: Circuit with E=+20 VE = +20\text{ V}, connected in series with two Silicon diodes (D1D_1 forward, D2D_2 opposing) and resistor R=5.6 kΩR = 5.6\text{ k}\Omega to ground.

      • State: D2D_2 opposes current flow, forcing an open circuit for the series loop.

      • Current: ID=0 AI_D = 0\text{ A}

      • Output Voltage: Vo=IDR=(0 A)(5.6 kΩ)=0 VV_o = I_D R = (0\text{ A})(5.6\text{ k}\Omega) = 0\text{ V}

      • Voltage across D1D_1: Since ID=0 AI_D = 0\text{ A}, VD1=0 VV_{D1} = 0\text{ V}

      • Voltage across D2D_2 (Applying KVL): E−VD1−VD2−Vo=0  ⟹  VD2=20 V−0 V−0 V=20 VE - V_{D1} - V_{D2} - V_o = 0 \implies V_{D2} = 20\text{ V} - 0\text{ V} - 0\text{ V} = 20\text{ V}

    • Example 2.9: Dual-supply series DC circuit: Positive supply E1=+10 VE_1 = +10\text{ V} connected through R1=4.7 kΩR_1 = 4.7\text{ k}\Omega, a Silicon diode, resistor R2=2.2 kΩR_2 = 2.2\text{ k}\Omega, to negative supply E2=−5 VE_2 = -5\text{ V}.

      • State: Net driving potential E1+E2=10 V+5 V=15 V>0.7 VE_1 + E_2 = 10\text{ V} + 5\text{ V} = 15\text{ V} > 0.7\text{ V}. Diode is ON (VD=0.7 VV_D = 0.7\text{ V}).

      • Loop Current: I=E1+E2−VDR1+R2=10 V+5 V−0.7 V4.7 kΩ+2.2 kΩ=14.3 V6.9 kΩ≈2.07 mAI = \frac{E_1 + E_2 - V_D}{R_1 + R_2} = \frac{10\text{ V} + 5\text{ V} - 0.7\text{ V}}{4.7\text{ k}\Omega + 2.2\text{ k}\Omega} = \frac{14.3\text{ V}}{6.9\text{ k}\Omega} \approx 2.07\text{ mA}

      • Voltage across R1R_1: V1=IR1=(2.07 mA)(4.7 kΩ)=9.73 VV_1 = I R_1 = (2.07\text{ mA})(4.7\text{ k}\Omega) = 9.73\text{ V}

      • Voltage across R2R_2: V2=IR2=(2.07 mA)(2.2 kΩ)=4.55 VV_2 = I R_2 = (2.07\text{ mA})(2.2\text{ k}\Omega) = 4.55\text{ V}

      • Output Node Voltage VoV_o (Applying KVL at output): −E2+V2−Vo=0  ⟹  Vo=V2−E2=4.55 V−5 V=−0.45 V-E_2 + V_2 - V_o = 0 \implies V_o = V_2 - E_2 = 4.55\text{ V} - 5\text{ V} = -0.45\text{ V}

DC Power Supply Architecture & Rectifier Circuits

DC Power Supply Block Diagram
  • Functional Stages of a Regulated Linear DC Power Supply:

    1. Step-Down Transformer: Converts high-voltage AC mains supply (220 V to 240 Vrms220\text{ V to } 240\text{ V}_{\text{rms}}) down to low-voltage AC (9 V,12 V,15 V,20 V,or 30 Vrms9\text{ V}, 12\text{ V}, 15\text{ V}, 20\text{ V}, \text{or } 30\text{ V}_{\text{rms}}) by selecting secondary-to-primary turns ratio.

    2. Rectifier: Converts alternating current (AC) into pulsating unsmoothed direct current (DC) using semiconductor diodes.

    3. Reservoir / Smoothing Filter: Utilizes high-value capacitors (or LC networks) to store charge during conduction peaks and release charge during troughs, smoothing voltage ripple.

    4. Voltage Regulator: Employs Zener diodes and series power transistors to stabilize output DC voltage against variations in load current and line input voltage.

  • Half-Wave Rectifier (HWR):

    • Employs a single diode connected in series with transformer secondary and load resistor RLR_L

    • Positive Half-Cycle Operation: Secondary terminal AA is positive relative to BB. Diode D1D_1 is forward biased (ON), behaving as a closed switch and conducting current through RLR_L

    • Negative Half-Cycle Operation: Secondary terminal BB is positive relative to AA. Diode D1D_1 is reverse biased (OFF), acting as an open switch and blocking current flow.

    • Voltage Levels (240 V to 12 Vrms240\text{ V to } 12\text{ V}_{\text{rms}} Step-down, 20:1 turns ratio):

      • Secondary RMS Voltage: Vrms=12 VV_{\text{rms}} = 12\text{ V}

      • Peak Secondary Voltage: Vpeak=2×Vrms=1.414×12 V=16.97 V≈17 VV_{\text{peak}} = \sqrt{2} \times V_{\text{rms}} = 1.414 \times 12\text{ V} = 16.97\text{ V} \approx 17\text{ V}

      • Peak Load Voltage: VL,peak=Vpeak−VF=17 V−0.7 V=16.3 VV_{L,\text{peak}} = V_{\text{peak}} - V_F = 17\text{ V} - 0.7\text{ V} = 16.3\text{ V}

    • Output Frequency: Output ripple frequency equals input mains frequency (fout=fin=50 Hzf_{\text{out}} = f_{\text{in}} = 50\text{ Hz}).

    • Worked Numerical Problem: A mains transformer with a turns ratio of 44:144:1 is connected to a 220 Vrms220\text{ V}_{\text{rms}} supply. Calculate the peak voltage across the load in a half-wave rectifier.

      • Secondary RMS Voltage: Vs,rms=Vp,rms44=220 V44=5 VrmsV_{s,\text{rms}} = \frac{V_{p,\text{rms}}}{44} = \frac{220\text{ V}}{44} = 5\text{ V}_{\text{rms}}

      • Peak Secondary Voltage: Vs,peak=5 V×2=7.07 VV_{s,\text{peak}} = 5\text{ V} \times \sqrt{2} = 7.07\text{ V}

      • Peak Load Voltage: VL,peak=7.07 V−0.7 V=6.37 VV_{L,\text{peak}} = 7.07\text{ V} - 0.7\text{ V} = 6.37\text{ V}

  • Bi-Phase (Centre-Tapped) Full-Wave Rectifier:

    • Requires a centre-tapped secondary transformer winding (12 V−0−12 V12\text{ V} - 0 - 12\text{ V}) and two diodes (D1,D2D_1, D_2).

    • Positive Half-Cycle: Terminal AA is positive relative to centre-tap BB, and BB is positive relative to CC. Diode D1D_1 conducts while D2D_2 is reverse biased.

    • Negative Half-Cycle: Terminal CC is positive relative to centre-tap BB, and BB is positive relative to AA. Diode D2D_2 conducts while D1D_1 is reverse biased.

    • Current flows through load RLR_L in the same direction on both half-cycles.

    • Output Frequency: fout=2fin=100 Hzf_{\text{out}} = 2 f_{\text{in}} = 100\text{ Hz}.

    • Peak Load Voltage: VL,peak=17 V−0.7 V=16.3 VV_{L,\text{peak}} = 17\text{ V} - 0.7\text{ V} = 16.3\text{ V}.

Bridge Rectifier Circuit Configuration
  • Full-Wave Bridge Rectifier:

    • Employs four diodes (D1,D2,D3,D4D_1, D_2, D_3, D_4) connected in a bridge network, requiring only a single standard secondary winding.

    • Positive Half-Cycle: Terminal AA is positive relative to BB. Diodes D1D_1 and D2D_2 are forward biased (ON), while D3D_3 and D4D_4 are reverse biased (OFF).

    • Negative Half-Cycle: Terminal BB is positive relative to AA. Diodes D3D_3 and D4D_4 are forward biased (ON), while D1D_1 and D2D_2 are reverse biased (OFF).

    • Current is routed through load RLR_L in the identical direction during both half-cycles.

    • Output Frequency: fout=2fin=100 Hzf_{\text{out}} = 2 f_{\text{in}} = 100\text{ Hz}.

    • Peak Voltage drop: Direct calculation yields VL,peak=Vm−2VF=17 V−1.4 V=15.6 VV_{L,\text{peak}} = V_m - 2 V_F = 17\text{ V} - 1.4\text{ V} = 15.6\text{ V} (or 16.3 V16.3\text{ V} under single diode approximation).

Reservoir, Smoothing Filters & Filter Calculations

  • Reservoir Capacitor (C1C_1):

    • Connected directly in parallel across load resistor RLR_L

    • Charging Phase: When rectifier voltage exceeds capacitor voltage, diode conducts and charges C1C_1 rapidly to peak voltage (16.3 V16.3\text{ V}).

    • Discharging Phase: When rectifier voltage drops below peak, diodes turn OFF. C1C_1 discharges slowly through RLR_L with time constant τ=RLC1\tau = R_L C_1

    • Because full-wave rectifiers supply pulses at 100 Hz100\text{ Hz} rather than 50 Hz50\text{ Hz}, discharge duration is halved, significantly reducing peak-to-peak ripple voltage for a given capacitance.

  • RC Smoothing Filter:

    • Consists of a series resistor R1R_1 and a parallel capacitor C2C_2 forming a low-pass voltage divider.

    • Capacitance C2C_2 is chosen to offer extremely low capacitive reactance (XCX_C) at ripple frequency relative to R1R_1

    • Capacitive Reactance Equation:         \n        X_C = \frac{1}{2 \pi f C_2}\n        

    • Output Ripple Voltage Equation:         \n        V_{\text{out,ripple}} = V_{\text{in,ripple}} \times \frac{X_C}{\sqrt{R_1^2 + X_C^2}}\n        

  • Worked Smoothing Filter Problem:

    • Problem Statement: An RC filter in a 50 Hz50\text{ Hz} half-wave rectifier consists of R1=100 ΩR_1 = 100\ \Omega and C2=1000 μFC_2 = 1000\ \mu\text{F}. If 1 V1\text{ V} of ripple appears at the input, determine the output ripple voltage.

    • Step 1: Compute Reactance XCX_C at f=50 Hzf = 50\text{ Hz}:         \n        X_C = \frac{1}{2 \pi (50\text{ Hz})(1000 \times 10^{-6}\text{ F})} = \frac{1}{6.28 \times 50 \times 10^{-3}} = \frac{1}{0.314} = 3.18\ \Omega\n        

    • Step 2: Calculate Output Ripple Potential:         \n        V_{\text{out,ripple}} = 1\text{ V} \times \frac{3.18\ \Omega}{\sqrt{100^2 + 3.18^2}} = \frac{3.18}{\sqrt{10000 + 10.1124}} = \frac{3.18}{\sqrt{10010.1124}} = \frac{3.18}{100.05} = 0.03178\text{ V} = 31.8\text{ mV}\n        

  • LC Smoothing Filter:

    • Employs a series choke inductor L1L_1 and parallel filter capacitor C2C_2

    • Inductor presents high inductive reactance (XL=2πfLX_L = 2 \pi f L) to AC ripple while presenting negligible resistance to DC current.

    • Capacitor shunts remaining AC ripple to ground, providing superior filtering efficiency without DC voltage loss across a series resistor.

Comprehensive Performance Comparison of Rectifiers

Summary of Rectifier Performance Parameters
  • Comprehensive Rectifier Performance Parameter Table:

Performance Parameter

Half-Wave Rectifier (HWR)

Full-Wave Centre-Tap (FWR-CT)

Full-Wave Bridge (FWR-Bridge)

Number of Diodes

11

22

44

Output DC Voltage (VdcV_{\text{dc}})

Vmπ≈0.318Vm\frac{V_m}{\pi} \approx 0.318 V_m

2Vmπ≈0.636Vm\frac{2 V_m}{\pi} \approx 0.636 V_m

2Vmπ≈0.636Vm\frac{2 V_m}{\pi} \approx 0.636 V_m

Output RMS Voltage (VrmsV_{\text{rms}})

Vm2=0.5Vm\frac{V_m}{2} = 0.5 V_m

Vm2≈0.707Vm\frac{V_m}{\sqrt{2}} \approx 0.707 V_m

Vm2≈0.707Vm\frac{V_m}{\sqrt{2}} \approx 0.707 V_m

Form Factor (FF=VrmsVdcFF = \frac{V_{\text{rms}}}{V_{\text{dc}}})

1.571.57

1.111.11

1.111.11

Ripple Factor (γ=FF2−1\gamma = \sqrt{FF^2 - 1})

1.211.21 (Higher)

0.4820.482 (Lower)

0.4820.482 (Lower)

Rectification Efficiency (η\eta)

40.5% to 40.6%40.5\% \text{ to } 40.6\%

81.16% to 81.2%81.16\% \text{ to } 81.2\%

81.16% to 81.2%81.16\% \text{ to } 81.2\%

Transformer Utilization Factor (TUF)

0.2860.286

0.5730.573

0.8100.810

Peak Inverse Voltage (PIV)

VmV_m

2Vm2 V_m (or VmV_m)

VmV_m

Peak Forward Current (IpeakI_{\text{peak}})

VmR\frac{V_m}{R}

VmR\frac{V_m}{R}

VmR\frac{V_m}{R}

Average Forward Current (IavgI_{\text{avg}})

VmπR\frac{V_m}{\pi R}

VmπR\frac{V_m}{\pi R}

VmπR\frac{V_m}{\pi R}

Ripple Output Frequency (foutf_{\text{out}})

finf_{\text{in}}

2fin2 f_{\text{in}}

2fin2 f_{\text{in}}