Comprehensive Guide to Diode and Transistor Electronics: Characteristics, Models, Rectification, Wave Shaping, and BJT Analysis

Semiconductor Fundamentals and Atomic Physics

• Classification of Materials Based on Electrical Conductivity:

  • Insulators: Extremely poor conductors of electricity that possess high electrical resistance. Examples include wood, glass, diamond, and mica.
  • Metals (Conductors): Excellent conductors of electric current that have very low electrical resistance. Examples include copper and aluminium.
  • Semiconductors: Materials whose electrical conductivity lies between that of conductors and insulators. Representative elemental examples include silicon ($\text{Si}$) and germanium ($\text{Ge}$).

• Structure of the Atom:

  • Nucleus: Protons (positively charged) and neutrons (neutral) are bound together tightly at the centre of the atom.
  • Orbital Electrons: Negatively charged electrons orbit the nucleus in fixed paths termed orbits or shells at distinct distances.
  • Shell Capacity: The maximum number of electrons contained within an orbit or shell is defined by the formula $2n^2$, where $n$ denotes the principal quantum number or shell index.
  • Energy Associated with Orbits: Each orbital shell is associated with a specific, discrete energy level. Electrons occupying orbits with a larger radius possess a proportionally greater amount of energy.

Energy Band Theory of Solids

• Valence Band: The distinct range of energy states (band) occupied by the valence electrons of an atom.
• Conduction Band: The range of energy states directly above the valence band occupied by conduction (free) electrons.
• Forbidden Energy Gap ($E_g$): The physical and energetical separation between the highest occupied energy level of the valence band and the lowest available energy level of the conduction band on an energy diagram:
  • Conductors: The conduction band overlaps directly with the valence band. Free electrons are abundant at all times without requiring external excitation.
  • Insulators: A very wide forbidden energy gap ($E_g$) separates the valence and conduction bands. Valence electrons remain tightly bound to lattice atoms, and no free electrons are available for electrical conduction under standard conditions.
  • Semiconductors: Characterized by a narrow forbidden energy gap. Thermal or external energy enables a subset of valence electrons to overcome this small barrier, transitioning into the conduction band to facilitate conduction.

• Material Types of Semiconductors:
  • Elemental Semiconductors: Pure crystalline elements from Group IV of the periodic table, specifically silicon ($\text{Si}$) and germanium ($\text{Ge}$).
  • Compound Semiconductors: Formed by chemical combinations such as gallium arsenide ($\text{GaAs}$) and cadmium selenide ($\text{CdSe}$).

Intrinsic and Extrinsic Semiconductor Physics

• Intrinsic Semiconductors:

  • Chemically pure semiconductors without any added impurity atoms or crystal defects.
  • Thermal excitation at room temperature imparts sufficient energy to enable some valence electrons to jump into the conduction band, becoming free charge carriers.
  • Each vacated electron leaves behind a vacant orbital space in the covalent lattice known as a hole.
  • Thermal generation produces equal numbers of electrons and holes simultaneously, creating electron-hole pairs ($n_i = p_i$).
  • Electrical current under an applied electric field consists of the concurrent flow of both free electrons and positive holes in opposite physical directions.

• Extrinsic Semiconductors and the Doping Process:

  • Extrinsic Semiconductor: Formed by adding controlled trace quantities of specific impurity atoms to pure semiconductors to significantly enhance electrical conductivity at room temperature.
  • Doping: The deliberate process of introducing foreign impurity atoms into an intrinsic crystal lattice.
  • Dopant: The specific impurity element introduced during the doping process.
  • Doping Ratio: The standard level of doping introduces approximately $1$ to $2$ impurity atoms for every $10^6$ intrinsic semiconductor atoms.

• N-Type Semiconductors:

  • Produced by doping intrinsic silicon or germanium with pentavalent dopant atoms (valence $5$), including phosphorus ($\text{P}$), arsenic ($\text{As}$), or antimony ($\text{Sb}$).
  • Four of the pentavalent atom's valence electrons form covalent bonds with four neighbouring silicon/germanium atoms.
  • The fifth valence electron is weakly bound to the impurity atom and easily excited into the conduction band by electric fields or ambient thermal energy.
  • Donor Impurity: The pentavalent dopant atom is known as a donor impurity because it donates a conduction electron.
  • Stationary Donor Ion: Once it donates an electron, the donor atom becomes an immobile, positively charged ion ($\oplus$).
  • Carrier Distribution: Conduction electrons serve as the majority charge carriers, while thermally generated holes serve as minority charge carriers.

• P-Type Semiconductors:
  • Produced by doping intrinsic silicon or germanium with trivalent dopant atoms (valence $3$), including boron ($\text{B}$), gallium ($\text{Ga}$), indium ($\text{In}$), or aluminium ($\text{Al}$).
  • The three valence electrons form covalent bonds with three adjacent host atoms, leaving an incomplete covalent bond that constitutes a hole.
  • Acceptor Impurity: The trivalent atom is termed an acceptor impurity because it readily accepts an electron from an adjacent bond to complete its fourth bond.
  • Stationary Acceptor Ion: Upon accepting an electron, the acceptor atom becomes an immobile, negatively charged ion ($\ominus$).
  • Carrier Distribution: Holes act as the majority charge carriers, while conduction electrons act as minority charge carriers.

• Comparative Evaluation: Intrinsic vs. Extrinsic Semiconductors:

  • Definition: Intrinsic is a pure semiconductor without impurities; Extrinsic is an impure semiconductor obtained through the addition of dopants.
  • Impurity Addition: Intrinsic has no intentional impurities added; Extrinsic involves pentavalent or trivalent dopants.
  • Process Required: Intrinsic requires no doping; Extrinsic is formed through the doping process.
  • Materials: Intrinsic includes pure silicon ($\text{Si}$) and germanium ($\text{Ge}$); Extrinsic includes doped silicon or germanium.
  • Carrier Equality: In intrinsic, electron concentration equals hole concentration ($n_i = p_i$); in extrinsic, carrier concentrations are unequal ($n \neq p$).
  • Charge Carriers: Intrinsic contains equal numbers of electrons and holes; Extrinsic has one predominant carrier type.
  • Majority Carriers: Intrinsic has no majority carriers; Extrinsic has electrons in N-type and holes in P-type.
  • Minority Carriers: Intrinsic has no minority carriers; Extrinsic has holes in N-type and electrons in P-type.
  • Electrical Conductivity: Intrinsic exhibits poor conductivity; Extrinsic exhibits substantially higher conductivity.
  • Carrier Concentration: Intrinsic is relatively low; Extrinsic is significantly increased through doping.
  • Impurity Level: Intrinsic has zero impurity atoms; Extrinsic contains approximately $1$ to $2$ impurity atoms per $10^6$ intrinsic atoms.

• Comparative Evaluation: N-Type vs. P-Type Semiconductors:

  • Impurity Valence: N-type utilizes pentavalent dopants ($5$ valence electrons); P-type utilizes trivalent dopants ($3$ valence electrons).
  • Impurity Name: N-type dopants are donor impurities; P-type dopants are acceptor impurities.
  • Mechanism: N-type provides one extra conduction electron; P-type creates a hole that accepts a free electron.
  • Resulting Stationary Ions: N-type produces positively charged immobile ions ($\oplus$); P-type produces negatively charged immobile ions ($\ominus$).
  • Carrier Dominance: In N-type, $\text{Electron Concentration} > \text{Hole Concentration}$; in P-type, $\text{Hole Concentration} > \text{Electron Concentration}$.
  • Common Elements: N-type uses arsenic ($\text{As}$), antimony ($\text{Sb}$), and phosphorus ($\text{P}$); P-type uses aluminium ($\text{Al}$), boron ($\text{B}$), and gallium ($\text{Ga}$).

Quantitative Theory of the PN Junction Diode

• PN Junction Diode Definition and Construction:
  • A two-terminal unidirectional semiconductor device that facilitates current flow primarily in one direction while blocking it in the reverse direction.
  • Constructed by doping adjacent halves of a single continuous semiconductor crystal with P-type and N-type impurities.
  • The boundary separating the P-type and N-type semiconductor sections is called the metallurgical junction (or PN junction).

• Junction Dynamics Under Open-Circuit Equilibrium:
  • High concentration gradients drive electrons to diffuse from the N-region into the P-region and holes to diffuse from the P-region into the N-region.
  • Diffusing electrons recombine with holes near the junction on the P-side, while diffusing holes recombine with electrons on the N-side.
  • This leaves unneutralized, immobile donor ions ($\oplus$) exposed on the N-side and immobile acceptor ions ($\ominus$) on the P-side.
  • The carrier-free zone populated exclusively by these fixed ions is termed the depletion region (also called the space charge region or transition region).
  • Depletion Layer Thickness: Approximately $0.5\,\mu\text{m}$.
  • Built-in Electric Field and Potential Barrier ($V_0$):
  • The uncovered ions establish an internal electric field directed from the positive N-side to the negative P-side.
  • This field opposes further diffusion of majority carriers, creating a contact potential, potential barrier, junction barrier, or cut-in voltage ($V_0$).
  • Barrier potential for Germanium ($\text{Ge}$): Approximately $0.3\,\text{V}$.
  • Barrier potential for Silicon ($\text{Si}$): Approximately $0.7\,\text{V}$.
  • Equilibrium: At thermal equilibrium without an applied bias, the forward diffusion current of majority carriers is balanced by the reverse drift current of minority carriers, yielding zero net current across the junction.

• Current Components in a Semiconductor:
  • Drift Current: Net movement of charged particles accelerated by an applied electric field.
  • Diffusion Current: Movement of charge carriers driven by a concentration gradient from regions of high concentration toward regions of low concentration.

Biasing and Operation of the PN Junction Diode

• Biasing Concept: Biasing denotes the application of an external DC voltage across an electronic device to set its operational state and provide the minimum voltage and current required for activation.
• Forward Biasing:
  • Terminal Connection: The positive terminal of an external voltage source is connected to the P-side (anode), and the negative terminal is connected to the N-side (cathode).
  • Internal Operation:
  • The positive terminal repels majority holes toward the junction, and the negative terminal repels majority electrons toward the junction.
  • When the applied potential $V < V_B$ (where $V_B$ is the barrier potential), the internal barrier resists carrier crossing, resulting in negligible current flow.
  • When the applied potential exceeds the barrier potential ($V > V_B$), the depletion region collapses, the barrier is overcome, and a substantial forward current begins to flow.

• Reverse Biasing:
  • Terminal Connection: The positive terminal of the voltage source is connected to the N-side (cathode), and the negative terminal is connected to the P-side (anode).
  • Internal Operation:
  • The negative potential attracts holes away from the junction on the P-side, while the positive potential attracts electrons away from the junction on the N-side.
  • This widens the depletion layer and exposes more immobile ions, increasing the internal potential barrier and electrical resistivity of the junction.
  • Theoretically, zero current flows; practically, a minute reverse saturation current ($I_0$) on the order of microamperes ($\mu\text{A}$) or nanoamperes ($\text{nA}$) flows due to thermally generated minority carriers.
  • When the reverse voltage reaches a critical threshold, minority carriers acquire sufficient kinetic energy to break covalent bonds via collisions, precipitating junction breakdown and a sharp rise in reverse current.
  • Breakdown Voltage: The specific reverse voltage at which junction breakdown occurs.
  • Peak Inverse Voltage (PIV): The maximum reverse voltage that can be applied across a PN junction without damaging the device.

Diode Terminal Equations and Temperature Dependence

• Diode Current Equation (Shockley Diode Equation):
  • The total current flowing through a PN junction diode is expressed mathematically as:   $I = I_0 \left(e^{\frac{V}{\eta V_T}} - 1\right)$
  • Parameter Definitions:
  • $I$: Total net diode current.
  • $V$: External terminal voltage applied across the diode (in volts).
  • $I_0$: Temperature-dependent reverse saturation current (typically expressed in $\mu\text{A}$).
  • $\eta$: Diode ideality factor ($\eta = 1$ for Germanium; $\eta = 2$ for Silicon under normal conditions, or $\,1$ at higher current levels).
  • $V_T$: Thermal voltage, defined by:     $V_T = \frac{k T}{q}$
  • $T$: Absolute junction temperature in Kelvin ($\text{K}$).
  • $k$: Boltzmann's constant, equal to $1.38 \times 10^{-23}\,\text{J/K}$.
  • $q$: Magnitude of electron charge ($1.602 \times 10^{-19}\,\text{C}$).

• Thermal Influence on Diode Behaviour:
  • PN junction parameters—such as reverse saturation current, forward operating current, reverse breakdown voltage, and barrier potential—vary with temperature.
  • Forward Bias Variation:
  • Rising temperature increases intrinsic carrier concentration, moving the Fermi level closer to the centre of the forbidden gap and lowering the built-in barrier potential.
  • As temperature increases, the cut-in (knee) voltage decreases, enabling conduction at lower applied voltages.
  • The barrier potential decreases at a rate of approximately $2\,\text{mV}/^\circ\text{C}$ for both silicon and germanium.
  • At a fixed forward voltage, the forward current increases with rising temperature.
  • Reverse Bias Variation:
  • The reverse saturation current ($I_0$) depends directly on minority carrier concentration, which is sensitive to thermal generation.
  • The reverse saturation current approximately doubles for every $10\,^\circ\text{C}$ increase in temperature, modeled by:     $I_{02} = I_{01} \left(2^{\frac{\Delta T}{10}}\right)$
  • The reverse breakdown voltage increases with rising temperature.

Diode Resistance and Capacitance Models

• Diode Resistance Configurations:
  • Static or DC Resistance ($R_{dc}$ or $R_F$): The direct ratio of operating DC voltage across the diode to the corresponding DC current flowing through it at a given operating point:   $R_{dc} = \frac{V_{dc}}{I_{dc}}$
  • Dynamic or AC Resistance ($r_{ac}$): The ratio of an incremental change in terminal voltage to the corresponding incremental change in diode current about a fixed quiescent operating point ($Q$-point):   $r_{ac} = \frac{\Delta V}{\Delta I}$

• Transition Capacitance ($C_T$):
  • Also called space-charge capacitance, barrier capacitance, or depletion-layer capacitance.
  • Dominates under reverse-biased conditions.
  • The widened depletion layer acts as a dielectric medium separating two conducting regions (P-type and N-type) that behave as parallel plates.
  • An incremental change in reverse voltage ($dV$) induces an incremental change in the stored charge ($dQ$):   $C_T = \frac{dQ}{dV}$
  • Transition capacitance in terms of physical parameters is given by:   $C_T = \frac{\varepsilon A}{W}$
  • Where $A$ denotes the cross-sectional area of the junction, $\varepsilon$ represents the permittivity of the semiconductor material, and $W$ is the width of the depletion region.
  • Because $W$ increases with applied reverse bias, $C_T$ decreases as the reverse voltage increases.

• Diffusion Capacitance ($C_D$):
  • Also known as storage capacitance; dominates under forward-biased conditions.
  • Arises from the storage of injected minority carriers adjacent to the edges of the narrowed depletion layer.
  • Defined mathematically as the rate of change of injected charge with applied voltage:   $C_D = \frac{dQ}{dV}$
  • Derivation of Diffusion Capacitance:
  • The total excess injected minority charge $Q$ relates to the forward current $I$ and carrier lifetime $\tau$ by:     $Q = \tau I$
  • Substituting the Shockley diode current equation $I = I_0 \left(e^{\frac{V}{\eta V_T}} - 1\right)$, with $e^{\frac{V}{\eta V_T}} \gg 1$ under practical forward bias:     $Q \approx \tau I_0 e^{\frac{V}{\eta V_T}}$
  • Differentiating $Q$ with respect to voltage $V$ yields:     $C_D = \frac{dQ}{dV} = \frac{d}{dV}\left(\tau I_0 e^{\frac{V}{\eta V_T}}\right) = \frac{\tau I_0}{\eta V_T} e^{\frac{V}{\eta V_T}}$
  • Rewriting in terms of forward current $I$ where $I \approx I_0 e^{\frac{V}{\eta V_T}}$, or exactly $I + I_0 = I_0 e^{\frac{V}{\eta V_T}}$, gives:     $C_D = \frac{\tau (I + I_0)}{\eta V_T}$
  • Under normal forward operating conditions where $I \gg I_0$:     $C_D = \frac{\tau I}{\eta V_T}$
  • Where $\tau$ is the mean carrier lifetime, $I$ is the forward diode current, $\eta$ is the ideality factor, and $V_T$ is the thermal voltage.

Equivalent Circuit Models of the Diode

• Ideal Diode Model:

  • Assumes zero forward threshold voltage and zero internal conduction resistance.
  • Forward Bias: Functions as an ideal closed switch ($R = 0\,\Omega$), conducting unlimited current with zero voltage drop across its terminals.
  • Reverse Bias: Functions as an ideal open switch ($R = \infty\,\Omega$), blocking all reverse current.
  • Valid when circuit resistance $R_{\text{network}} \gg r_{\text{on}}$ and supply voltage $E_{\text{network}} \gg V_\gamma$.

• Simplified Diode Model:

  • Incorporates the knee/cut-in voltage ($V_\gamma$), modeling the diode as a DC battery of value $V_\gamma$ in series with an ideal diode switch.
  • Conduction begins only when the forward voltage exceeds $V_\gamma$ ($0.7\,\text{V}$ for silicon, $0.3\,\text{V}$ for germanium).
  • Internal forward resistance $r_{\text{on}}$ is assumed negligible.
  • Valid when network resistance dominates over internal diode resistance ($R_{\text{network}} \gg r_{\text{on}}$).

• Piecewise-Linear Model:

  • The most comprehensive linear approximation of the real diode curve.
  • Modeled as a series combination of the cut-in voltage ($V_\gamma$), internal dynamic forward resistance ($r_{\text{on}}$), and an ideal diode switch.
  • For $V < V_\gamma$, current is zero (open switch).
  • For $V \ge V_\gamma$, current increases linearly according to the slope determined by $r_{\text{on}}$.

Regulated DC Power Supply and Rectifier Principles

• Role of DC Power Supplies: Electronic circuits require stable DC voltages for biasing. Regulated DC power supplies convert commercial high-voltage AC mains ($230\,\text{V}$ AC) into a stable, ripple-free low-voltage DC output (such as $5\,\text{V}$ DC).
• Core Functional Subsystems:
  • Step-Down Transformer: Reduces high AC line voltage ($230\,\text{V}$) to a lower, safer AC voltage while providing electrical isolation.
  • Rectifier Unit: Converts bidirectional sinusoidal AC voltage into pulsating, unidirectional DC using PN junction diodes.
  • Smoothing Filter: Suppresses AC ripple components from the pulsating DC to produce a smooth DC level.
  • Voltage Regulator: Maintains a constant DC output voltage despite fluctuations in load current or AC input line voltage.

• Standard Mathematical Metrics of Rectifiers:
  • Average or DC Output Voltage ($V_{dc}$):$V_{dc} = \frac{1}{T}\int_0^T v_L(t)\,dt$
  • Effective or RMS Output Voltage ($V_{rms}$):$V_{rms} = \sqrt{\frac{1}{T}\int_0^T v_L^2(t)\,dt}$
  • DC Power Output ($P_{DC}$):$P_{DC} = I_{dc}^2 R_L = V_{dc} I_{dc}$
  • AC Power Input ($P_{AC}$):$P_{AC} = I_{rms}^2 [R_L + R_f + R_s]$
  • where $R_L$ is load resistance, $R_f$ is diode forward resistance, and $R_s$ is transformer secondary winding resistance.
  • Rectification Efficiency ($\eta$): Ratio of DC output power delivered to the load relative to the total AC input power consumed:   $\eta = \frac{P_{DC}}{P_{AC}}$
  • Ripple Factor ($\gamma$): Measure of the residual AC content remaining in the rectified output:   $\gamma = \frac{V_{ac}}{V_{dc}} = \sqrt{\left(\frac{I_{rms}}{I_{dc}}\right)^2 - 1}$
  • Transformer Utilization Factor (TUF): Ratio of DC power delivered to the load to the effective AC volt-ampere (VA) rating of the transformer secondary:   $\text{TUF} = \frac{P_{DC}}{P_{AC(\text{rated})}}$
  • Voltage Regulation: Ratio of the change in DC output voltage from no-load ($V_{NL}$) to full-load ($V_{FL}$) conditions, relative to full-load voltage:   $\text{Voltage Regulation} = \frac{(V_{dc})_{NL} - (V_{dc})_{FL}}{(V_{dc})_{FL}}$
  • Form Factor: Ratio of RMS value to the DC/average value ($\text{Form Factor} = \frac{\text{RMS Value}}{\text{Average Value}}$).
  • Peak Factor: Ratio of the peak value to the RMS value ($\text{Peak Factor} = \frac{\text{Peak Value}}{\text{RMS Value}}$).

Half-Wave Rectifier Analysis

• Circuit Architecture and Operation:
  • Consists of an AC transformer, a single PN junction diode ($D$), and a load resistor ($R_L$).
  • Positive Half-Cycle ($0 \le \omega t \le \pi$): The secondary voltage makes the diode anode positive relative to the cathode, forward-biasing the diode. It acts as a closed switch, passing the sinusoidal voltage pulse to $R_L$.
  • Negative Half-Cycle ($\pi \le \omega t \le 2\pi$): The secondary polarity reverses, reverse-biasing the diode. It acts as an open switch, blocking current flow and holding the output voltage across $R_L$ at zero.

• Mathematical Analysis of Half-Wave Rectification:
  • Applied input voltage: $v_i(t) = V_m \sin(\omega t)$
  • Instantaneous circuit current:   $i(t) = \begin{cases} I_m \sin(\omega t) & \text{for } 0 \le \omega t \le \pi \\ 0 & \text{for } \pi \le \omega t \le 2\pi \end{cases}$
  • Peak current: $I_m = \frac{V_m}{R_s + R_f + R_L}$
  • Average / DC Current ($I_{dc}$):$I_{dc} = \frac{1}{2\pi}\int_0^\pi I_m \sin(\omega t)\,d(\omega t) = \frac{I_m}{2\pi}[-\cos(\omega t)]_0^\pi = \frac{I_m}{\pi} \approx 0.318 I_m$
  • Average / DC Voltage ($V_{dc}$):$V_{dc} = I_{dc} R_L = \frac{V_m}{\pi} \approx 0.318 V_m$
  • RMS Output Current ($I_{rms}$):$I_{rms} = \sqrt{\frac{1}{2\pi}\int_0^\pi I_m^2 \sin^2(\omega t)\,d(\omega t)} = \frac{I_m}{2} = 0.5 I_m$
  • RMS Output Voltage ($V_{rms}$):$V_{rms} = \frac{V_m}{2} = 0.5 V_m$
  • Rectification Efficiency ($\eta$):$\eta = \frac{P_{DC}}{P_{AC}} = \frac{\left(\frac{I_m}{\pi}\right)^2 R_L}{\left(\frac{I_m}{2}\right)^2 (R_L + R_f + R_s)} \approx \frac{4}{\pi^2} \approx 0.406 = 40.6\%$
  • Ripple Factor ($\gamma$):$\gamma = \sqrt{\left(\frac{I_{rms}}{I_{dc}}\right)^2 - 1} = \sqrt{\left(\frac{I_m / 2}{I_m / \pi}\right)^2 - 1} = \sqrt{\left(\frac{\pi}{2}\right)^2 - 1} \approx 1.21$
  • Peak Inverse Voltage (PIV): Equal to the maximum peak secondary voltage: $\text{PIV} = V_m$.
  • Form Factor: $\frac{I_m / 2}{I_m / \pi} = \frac{\pi}{2} \approx 1.57$.
  • Peak Factor: $\frac{V_m}{V_m / 2} = 2$.
  • Transformer Utilization Factor (TUF): $\text{TUF} = 0.287$.
  • Output Ripple Frequency: Identical to the supply frequency: $f_{\text{ripple}} = f$.
  • Disadvantages: Low efficiency ($40.6\%$), high ripple factor ($1.21$), poor transformer utilization, and potential DC core saturation.

Full-Wave Rectifiers: Center-Tapped and Bridge Topologies

• Center-Tapped Full-Wave Rectifier:
  • Utilizes a center-tapped secondary transformer winding and two diodes ($D_1, D_2$).
  • Positive Half-Cycle: Terminal A is positive relative to the center tap, and Terminal B is negative. Diode $D_1$ is forward-biased, while diode $D_2$ is reverse-biased. Current flows through $D_1$ and load $R_L$.
  • Negative Half-Cycle: Polarity reverses; Terminal B is positive relative to the center tap, and Terminal A is negative. Diode $D_2$ is forward-biased, while diode $D_1$ is reverse-biased. Current flows through $D_2$ and load $R_L$ in the same direction.

• Mathematical Derivations for Full-Wave Rectification:

  • Average / DC Current ($I_{dc}$):$I_{dc} = \frac{2}{\pi}\int_0^\pi I_m \sin(\omega t)\,d(\omega t) = \frac{2I_m}{\pi} \approx 0.636 I_m$
  • Average / DC Voltage ($V_{dc}$):$V_{dc} = \frac{2V_m}{\pi} \approx 0.636 V_m$
  • RMS Value of Output Current ($I_{rms}$):$I_{rms} = \sqrt{\frac{1}{\pi}\int_0^\pi I_m^2 \sin^2(\omega t)\,d(\omega t)} = \frac{I_m}{\sqrt{2}} \approx 0.707 I_m$
  • RMS Output Voltage ($V_{rms}$):$V_{rms} = \frac{V_m}{\sqrt{2}} \approx 0.707 V_m$
  • Rectification Efficiency ($\eta$):$\eta = \frac{P_{DC}}{P_{AC}} = \frac{\left(\frac{2I_m}{\pi}\right)^2 R_L}{\left(\frac{I_m}{\sqrt{2}}\right)^2 R_L} = \frac{8}{\pi^2} \approx 0.812 = 81.2\%$
  • Ripple Factor ($\gamma$):$\gamma = \sqrt{\left(\frac{I_{rms}}{I_{dc}}\right)^2 - 1} = \sqrt{\left(\frac{I_m / \sqrt{2}}{2I_m / \pi}\right)^2 - 1} = \sqrt{\left(\frac{\pi}{2\sqrt{2}}\right)^2 - 1} \approx 0.482$
  • Form Factor: $\frac{I_{rms}}{I_{dc}} = \frac{I_m / \sqrt{2}}{2I_m / \pi} = \frac{\pi}{2\sqrt{2}} \approx 1.11$.
  • Peak Factor: $\frac{V_m}{V_m / \sqrt{2}} = \sqrt{2} \approx 1.414$.
  • Peak Inverse Voltage (Center-Tapped): $\text{PIV} = 2V_m$.
  • Transformer Utilization Factor: Overall $\text{TUF} = 0.693$ (with secondary TUF equal to $0.574$).
  • Output Ripple Frequency: Doubled relative to input line frequency: $f_{\text{ripple}} = 2f$.

• Bridge Full-Wave Rectifier:

  • Employs four diodes arranged in a closed bridge topology without requiring a center-tapped transformer.
  • Positive Half-Cycle: Point A is positive, Point B is negative. Diodes $D_1$ and $D_2$ conduct in series with the load resistor, while $D_3$ and $D_4$ remain reverse-biased.
  • Negative Half-Cycle: Point B is positive, Point A is negative. Diodes $D_3$ and $D_4$ conduct in series with the load resistor, maintaining the same current direction through $R_L$.
  • Key Operational Advantages:
  • Eliminates the need for a bulky, expensive center-tapped transformer.
  • Half the PIV rating of the center-tapped configuration ($\text{PIV} = V_m$).
  • High transformer utilization factor ($\text{TUF} = 0.812$).

Rectifier Comparison and Performance Analysis

• Summary Comparison Table:
  • Number of Diodes: Half-Wave Rectifier = $1$; Center-Tapped FWR = $2$; Bridge Rectifier = $4$.
  • Peak Inverse Voltage (PIV): Half-Wave Rectifier = $V_m$; Center-Tapped FWR = $2V_m$; Bridge Rectifier = $V_m$.
  • Secondary Voltage (RMS): Half-Wave Rectifier = $V$; Center-Tapped FWR = $V - 0 - V$; Bridge Rectifier = $V$.
  • DC Output Voltage (No Load): Half-Wave Rectifier = $\frac{V_m}{\pi} = 0.318 V_m$; Center-Tapped FWR = $\frac{2V_m}{\pi} = 0.636 V_m$; Bridge Rectifier = $\frac{2V_m}{\pi} = 0.636 V_m$.
  • Ripple Factor ($\gamma$): Half-Wave Rectifier = $1.21$; Center-Tapped FWR = $0.482$; Bridge Rectifier = $0.482$.
  • Ripple Frequency: Half-Wave Rectifier = $f$; Center-Tapped FWR = $2f$; Bridge Rectifier = $2f$.
  • Rectification Efficiency ($\eta$): Half-Wave Rectifier = $0.406$ ($40.6\%$); Center-Tapped FWR = $0.812$ ($81.2\%$); Bridge Rectifier = $0.812$ ($81.2\%$).
  • Transformer Utilization Factor (TUF): Half-Wave Rectifier = $0.287$; Center-Tapped FWR = $0.693$; Bridge Rectifier = $0.812$.

Rectifier Smoothing Filters

• Filter Function: Rectifier outputs contain both a DC component and unwanted AC harmonics (ripples). Filters suppress these AC components, delivering a steady DC output voltage.
• Filter Configurations: Inductor filter (series $L$), Capacitor filter (shunt $C$), $LC$ / L-section choke input filter, and $\pi$-type ($CLC$) filter.
• Capacitor Filter Operation:
  • A large smoothing capacitor $C$ is placed in parallel across the load resistor $R_L$.
  • Charging Cycle: When the rectified input voltage exceeds the capacitor voltage, the diode conducts and charges the capacitor up to the peak input voltage $V_m$.
  • Discharging Cycle: As the input voltage drops below its peak, the diode becomes reverse-biased, isolating the rectifier. The capacitor discharges through $R_L$ at a rate governed by the time constant $R_L C$.
  • A large time constant relative to the AC period ($R_L C \gg T$) minimizes voltage drop during non-conduction intervals, reducing ripple.

• Mathematical Ripple Factor Formulations with Capacitor Filter:
  • Full-Wave Rectifier with Capacitor Filter:$\text{Ripple Factor } (\gamma) = \frac{1}{4\sqrt{3} f C R_L}$
  • Half-Wave Rectifier with Capacitor Filter:$\text{Ripple Factor } (\gamma) = \frac{1}{2\sqrt{3} f C R_L}$
  • where $f$ represents the fundamental input line frequency, $C$ is the filter capacitance, and $R_L$ is the load resistance.

Non-Linear Wave Shaping: Clipping Circuits

• Clipping Circuit (Limiter) Concept: Waveform shaping circuits that remove portions of an applied signal above or below selected voltage reference levels without distorting the remaining waveform. Used in radar, communication systems, and digital processing.

• Positive Series Clipper:

  • The diode is connected in series with the load resistor, with its cathode pointing toward the load.
  • Positive Half-Cycle: Diode is reverse-biased (acts as an open circuit); no current flows through $R_L$, holding output $V_0 = 0\,\text{V}$.
  • Negative Half-Cycle: Diode is forward-biased (acts as a short circuit); the negative input waveform appears across the load ($V_0 = -V_m$).

• Positive Shunt Clipper:
  • The diode is connected in parallel with the load resistor, pointing toward ground.
  • Positive Half-Cycle: Diode is forward-biased, clamping the output voltage to approximately $0\,\text{V}$ (or the diode's forward drop).
  • Negative Half-Cycle: Diode is reverse-biased, allowing the negative input to pass to the load via the voltage divider.

• Negative Series Clipper:
  • The diode is placed in series with the load, with its anode connected to the input.
  • Positive Half-Cycle: Diode conducts (acts as a closed switch), delivering the positive waveform to the load.
  • Negative Half-Cycle: Diode is reverse-biased (acts as an open switch), resulting in an output of $0\,\text{V}$.

• Negative Shunt Clipper:
  • The diode is connected in shunt across the load, oriented away from ground.
  • Positive Half-Cycle: Diode is reverse-biased, passing the positive waveform to the output.
  • Negative Half-Cycle: Diode conducts, clamping the output to ground.

• Biased Clippers:
  • Incorporate an independent DC bias source ($V_r$) in series with the clipping diode to adjust the clipping threshold.
  • Biased Positive Clipper: Clips only the portion of the positive cycle that exceeds the reference voltage ($+V_r$).
  • Positive Series Clipper with Negative Bias ($-V_r$): The diode conducts only when the input drops below $-V_r$.
  • Positive Series Clipper with Positive Bias ($+V_r$): The diode passes signals below the positive reference $+V_r$.

• Combination Clipper:
  • Employs two anti-parallel diodes connected in parallel branches with independent bias voltages ($+V_1$ and $-V_2$).
  • Clips both positive peaks above $+V_1$ and negative peaks below $-V_2$.
  • For inputs between $+V_1$ and $-V_2$, neither diode conducts, and the input waveform passes directly to the output.

Non-Linear Wave Shaping: Clamping Circuits

• Clamping Circuit (DC Restorer) Concept: A network consisting of a capacitor, a diode, and a resistive element that shifts the DC baseline of an AC signal to a desired level without altering the signal's wave shape or peak-to-peak amplitude.

• Positive Clamper Circuit:
  • Shifts the applied input signal upward, positioning its negative peaks on the zero-volt reference line.
  • Operation:
  • Initial Positive Half-Cycle: The diode is reverse-biased; the capacitor does not charge significantly.
  • Negative Half-Cycle: The diode becomes forward-biased (acts as a short circuit), rapidly charging the capacitor to the peak input voltage $V_m$ with positive polarity on the right plate.
  • Subsequent Positive Half-Cycle: The diode is reverse-biased (acts as an open circuit). The stored capacitor voltage adds to the incoming input signal, shifting the output peak to $V_o = V_m + V_m = 2V_m$.

• Positive Clamper with Positive Bias ($+V_b$):
  • A DC voltage source ($+V_b$) is placed in series with the diode.
  • Shifts the waveform upward so that its lowest negative boundary is clamped at the positive reference potential $+V_b$.
  • The output oscillates over the range from $V_b$ to $2V_m + V_b$.

• Negative Clamper with Positive Bias ($+V_b$):
  • The diode is oriented downward toward ground in series with a positive battery $V_b$.
  • Shifting introduces an upward baseline offset equal to $+V_b$, clamping the upper boundary to $+V_b$.
  • The output waveform swings over the range from $+V_b$ down to $-2V_m + V_b$.

• Negative Clamper with Negative Bias ($-V_b$):
  • Shifting introduces a downward baseline offset by the battery voltage $-V_b$.
  • Clamps the maximum positive level of the waveform to $-V_b$, shifting the signal further downward.
  • The output waveform swings over the range from $-V_b$ down to $-2V_m - V_b$.

Zener Diode Characteristics and Voltage Regulation

• Zener Diode Fundamentals:
  • A heavily doped silicon PN junction diode engineered to operate safely in its reverse breakdown region.
  • Operates like a conventional diode in forward bias, with a cut-in voltage around $0.7\,\text{V}$.
  • Under reverse bias, it maintains an almost constant terminal voltage ($V_Z$) across a wide range of reverse currents.
  • Key Applications: Voltage regulators, waveform limiters/clippers, voltage level shifters, and reference voltage sources.

• Reverse Breakdown Mechanisms:
  • Zener Breakdown: Occurs in heavily doped junctions with narrow depletion regions ($< 10\,\text{nm}$) at low reverse voltages (typically $< 6\,\text{V}$). High electric fields ($\approx 3 \times 10^7\,\text{V/m}$) directly pull valence electrons out of covalent bonds through quantum tunneling.
  • Avalanche Breakdown: Occurs in lightly doped junctions with wide depletion regions at higher reverse voltages (typically $> 6\,\text{V}$). Thermally generated minority carriers accelerate in the electric field, gaining kinetic energy and freeing additional valence electrons via collision ionization in a cascading process.

• Zener Diode as a Shunt Voltage Regulator:
  • The Zener diode is connected in reverse-bias across the load resistor $R_L$, with a current-limiting resistor $R_S$ in series with the unregulated input source $V_{in}$.
  • Circuit equation governing operation:   $V_o = V_Z = V_{in} - I_S R_S$$I_S = I_Z + I_L$
  • where $I_S = \frac{V_{in} - V_Z}{R_S}$ and $I_L = \frac{V_Z}{R_L}$.

• Regulation Analysis Across Operational Cases:
  • Case 1: Load Current ($I_L$) Increases (Fixed $V_{in}$): When load demand increases, Zener current $I_Z$ decreases by a corresponding amount, keeping series current $I_S$ and series drop $I_S R_S$ constant. As a result, $V_o = V_Z$ remains regulated.
  • Case 2: Load Current ($I_L$) Decreases (Fixed $V_{in}$): When load demand drops, $I_Z$ increases to absorb the surplus current, holding $I_S$ constant and preserving regulation.
  • Case 3: Input Voltage ($V_{in}$) Increases (Fixed $R_L$): Higher input voltage increases $I_S$. The extra current is shunted through the Zener diode ($I_Z$ increases) while $I_L$ remains fixed. The larger voltage drop across $R_S$ absorbs the excess input, holding $V_o = V_Z$ constant.
  • Case 4: Input Voltage ($V_{in}$) Decreases (Fixed $R_L$): Lower input voltage reduces $I_S$, which in turn reduces $I_Z$. The voltage drop across $R_S$ decreases proportionally, maintaining $V_o = V_Z$.
• Limitations of Zener Regulators: Poor power efficiency under heavy load currents due to continuous dissipation in $R_S$, and small output voltage variations caused by internal Zener dynamic impedance ($r_z$).

Bipolar Junction Transistor (BJT) Fundamentals and Structure

• BJT Definition: A three-terminal, current-controlled active device whose operation relies on the transport of both majority and minority charge carriers—hence termed bipolar.
• Operational Metaphor: Derived from transfer-resistor (transistor), representing the internal transfer of a signal from a low-resistance, forward-biased input circuit to a high-resistance, reverse-biased output circuit.
• Physical Transistor Types:
  • PNP Transistor: Consists of an N-type base layer sandwiched between two P-type layers.
  • NPN Transistor: Consists of a P-type base layer sandwiched between two N-type layers.

• Three Functional Regions and Terminals:
  • Emitter (E): Heavily doped region. Its primary role is to inject a large concentration of majority carriers into the central base.
  • Base (B): Lightly doped and physically narrow (thin) middle region. Designed to pass the vast majority of injected carriers through to the collector with minimal recombination.
  • Collector (C): Moderately doped and physically the largest region, with greater surface area to dissipate the heat generated by carrier collection.
• Two Internal Junctions:
  • Emitter-Base Junction ($J_E$ or EB junction): Controls carrier injection.
  • Collector-Base Junction ($J_C$ or BC junction): Collects the injected carriers.

Operating Regions and Carrier Transport Mechanisms in BJTs

• Transistor Operating Regions and Biasing Conditions:

  • Cutoff Region:
  • Emitter-Base Junction ($J_E$): Reverse-biased.
  • Collector-Base Junction ($J_C$): Reverse-biased.
  • Base Current ($I_B$): $I_B = 0$.
  • Collector Current ($I_C$): $I_C \approx 0$.
  • Voltage Drop ($V_{CE}$): High ($\approx V_{CC}$).
  • Circuit Application: Open switch (OFF mode).
  • Active Region:
  • Emitter-Base Junction ($J_E$): Forward-biased.
  • Collector-Base Junction ($J_C$): Reverse-biased.
  • Base Current ($I_B$): Small, controlled current.
  • Collector Current ($I_C$): $I_C = \beta I_B$.
  • Voltage Drop ($V_{CE}$): Moderate operating voltage.
  • Circuit Application: Linear signal amplifier.
  • Saturation Region:
  • Emitter-Base Junction ($J_E$): Forward-biased.
  • Collector-Base Junction ($J_C$): Forward-biased.
  • Base Current ($I_B$): High (sufficient for overdrive).
  • Collector Current ($I_C$): Maximum value, constrained by the external load network.
  • Voltage Drop ($V_{CE}$): Very low ($V_{CE(\text{sat})} \approx 0.2\,\text{V}$ for silicon).
  • Circuit Application: Closed switch (ON mode).

• NPN Transistor Working Principle (Active Mode):

  • The forward-biased emitter-base junction injects large quantities of majority electrons from the heavily doped $N^+$ emitter into the thin P-type base.
  • Because the base is lightly doped and narrow, fewer than $5\%$ of these injected electrons recombine with base holes, producing a small base current ($I_B$).
  • More than $95\%$ of the injected electrons diffuse across the base to the edge of the reverse-biased collector-base junction.
  • The strong electric field across the reverse-biased collector-base junction sweeps these electrons into the collector, forming the collector current ($I_C$).
  • Emitter current is the sum of base and collector currents:   $I_E = I_B + I_C$

• PNP Transistor Working Principle (Active Mode):
  • The forward-biased emitter-base junction injects majority holes from the heavily doped $P^+$ emitter into the thin N-type base.
  • Fewer than $5\%$ of these holes recombine with free electrons in the base, contributing to base current ($I_B$).
  • The remaining holes (over $95\%$) diffuse to the collector junction and are swept into the collector by the reverse-bias field, establishing the collector current ($I_C$).
  • The terminal current relationship remains:   $I_E = I_B + I_C$

Transistor Current Components and Parameters

• Current Components Analysis (for PNP Transistor):
  • The total emitter current ($I_E$) is composed of hole current ($I_{pE}$ or $I_{hE}$) and electron current ($I_{nE}$ or $I_{eE}$):   $I_E = I_{hE} + I_{eE}$
  • Recombination in the base accounts for base current:   $I_B = I_{hE} - I_{hC}$
  • Collector current consists of collected holes ($I_{hC}$) plus reverse collector leakage current ($I_{CO}$ or $I_{CBO}$):   $I_C = I_{hC} + I_{CO}$
  • The leakage current ($I_{CO}$) is the sum of hole leakage ($I_{hCO}$) and electron leakage ($I_{eCO}$):   $I_{CO} = I_{hCO} + I_{eCO}$
  • Expressed via common-base current gain ($\alpha$):   $I_C = \alpha I_E + I_{CO}$

• Transistor Efficiency Parameters:
  • Emitter Injection Efficiency ($\gamma$): Measures the ratio of injected majority carriers to total emitter current:   $\gamma = \frac{I_{pE}}{I_{pE} + I_{nE}} = \frac{I_{pE}}{I_E}$
  • Base Transport Factor ($\beta^*$): The ratio of injected carriers that reach the collector junction without recombining in the base to the total carriers injected at the emitter junction:   $\beta^* = \frac{\text{Injected carrier current reaching } J_C}{\text{Injected carrier current entering base at } J_E} = \frac{I_{hC}}{I_{hE}}$
  • Large Signal Current Gain ($\alpha$): The product of the emitter efficiency and base transport factor:   $\alpha = \gamma \beta^* = \frac{I_C - I_{CO}}{I_E}$

Common-Base (CB) Configuration: Characteristics and h-Parameters

• Circuit Topology:
  • The base terminal is shared between the input and output circuits, typically tied to ground.
  • The emitter serves as the input terminal, and the collector serves as the output terminal.
  • Provides significant voltage gain, but its current gain ($\alpha$) is less than unity ($< 1$).

• Input Characteristics:
  • Plots input current ($I_E$) versus input voltage ($V_{EB}$) for constant values of output voltage ($V_{CB}$).
  • Resembles the forward-bias curve of a conventional diode.
  • Increasing the collector reverse bias ($V_{CB}$) shifts the curve slightly to the left due to base-width modulation (Early effect).

• Output Characteristics:
  • Plots output current ($I_C$) versus output voltage ($V_{CB}$) for constant values of input current ($I_E$).
  • Active Region: The curves are essentially horizontal, showing that $I_C$ is determined by $I_E$ and is largely independent of $V_{CB}$.
  • Cutoff Region: The region where $I_E = 0$, leaving only a minute leakage current ($I_{CO}$).
  • Saturation Region: Corresponds to forward bias on both junctions, where $I_C$ drops rapidly toward zero.

• Early Effect (Base-Width Modulation):

  • Increasing the reverse-bias voltage across the collector-base junction ($V_{CB}$) widens its depletion region.
  • This widening penetrates primarily into the lightly doped base, reducing the effective neutral base width ($W_b$).
  • Consequences of the Early effect:
  • Reduces recombination within the base, which increases the transport factor $\beta^*$ and current gain $\alpha$.
  • Steitens the concentration gradient of injected carriers across the base, increasing the emitter current $I_E$.
  • Punch-Through: At very high reverse collector voltages, the depletion region can expand across the entire base to meet the emitter depletion layer. The effective base width drops to zero, causing breakdown and loss of transistor control.

• Common-Base Current Equation Derivation:

  • DC Current gain definition:   $\alpha = \frac{I_C - I_{CO}}{I_E}$$\alpha I_E = I_C - I_{CO}$
  • Because $I_E = I_B + I_C$:   $\alpha(I_B + I_C) = I_C - I_{CO}$$\alpha I_B + \alpha I_C = I_C - I_{CO}$$(1 - \alpha) I_C = \alpha I_B + I_{CO}$$I_C = \frac{\alpha}{1 - \alpha} I_B + \frac{1}{1 - \alpha} I_{CO}$

• Common-Base Hybrid Parameters (h-Parameters):

  • Input Impedance ($h_{ib}$): Ratio of incremental change in emitter voltage to change in emitter current, at constant $V_{CB}$:   $h_{ib} = \left.\frac{\Delta V_{EB}}{\Delta I_E}\right|_{V_{CB} = \text{Constant}}$
  • Output Admittance ($h_{ob}$): Ratio of incremental change in collector current to change in collector voltage, at constant $I_E$:   $h_{ob} = \left.\frac{\Delta I_C}{\Delta V_{CB}}\right|_{I_E = \text{Constant}}$
  • Forward Current Gain ($h_{fb}$): Ratio of incremental change in collector current to change in emitter current, at constant $V_{CB}$:   $h_{fb} = \left.\frac{\Delta I_C}{\Delta I_E}\right|_{V_{CB} = \text{Constant}}$
  • Reverse Voltage Gain ($h_{rb}$): Ratio of incremental change in emitter voltage to change in collector voltage, at constant $I_E$:   $h_{rb} = \left.\frac{\Delta V_{EB}}{\Delta V_{CB}}\right|_{I_E = \text{Constant}}$

Common-Emitter (CE) Configuration: Characteristics and h-Parameters

• Circuit Topology:
  • The emitter is grounded and common to both the input (base-emitter) and output (collector-emitter) circuits.
  • The base serves as the input terminal, and the collector serves as the output terminal.
  • Widely used because it provides both substantial current gain and high voltage gain.

• Input Characteristics:
  • Plots base current ($I_B$) versus base-emitter voltage ($V_{BE}$) for constant values of collector-emitter voltage ($V_{CE}$).
  • Operates like a forward-biased diode with a cut-in voltage around $0.7\,\text{V}$ for silicon.
  • Increasing $V_{CE}$ shifts the curve to the right: the stronger reverse bias widens the collector depletion region, reducing the effective base width and lowering recombination current ($I_B$) for a given $V_{BE}$.

• Output Characteristics:
  • Plots collector current ($I_C$) versus collector-emitter voltage ($V_{CE}$) across different constant base currents ($I_B$).
  • Active Region: $I_C$ is approximately constant for a given $I_B$, with a slight upward tilt due to base-width modulation (finite output resistance).
  • Saturation Region: For $V_{CE} < 0.2\,\text{V}$, both junctions are forward-biased, and $I_C$ falls steeply.
  • Cutoff Region: The region below $I_B = 0$, where only the tiny reverse leakage current ($I_{CEO}$) flows.

• Common-Emitter Current Equations and Gain Parameter (Beta, $\beta$):

  • AC current amplification factor:   $\beta = \left.\frac{\Delta I_C}{\Delta I_B}\right|_{V_{CE} = \text{Constant}}$
  • Derivation relating $\beta$ to Common-Base gain $\alpha$:   $I_C = \alpha I_E + I_{CBO}$
  • Substituting $I_E = I_B + I_C$:   $I_C = \alpha(I_B + I_C) + I_{CBO} = \alpha I_B + \alpha I_C + I_{CBO}$$I_C(1 - \alpha) = \alpha I_B + I_{CBO}$$I_C = \frac{\alpha}{1 - \alpha} I_B + \frac{I_{CBO}}{1 - \alpha}$
  • Comparing this with the CE expression $I_C = \beta I_B + I_{CEO}$ yields:   $\beta = \frac{\alpha}{1 - \alpha}$$I_{CEO} = \frac{I_{CBO}}{1 - \alpha} = (\beta + 1) I_{CBO}$
  • Thus, total collector current is:   $I_C = \beta I_B + (\beta + 1) I_{CBO}$

• Common-Emitter Hybrid Parameters (h-Parameters):

  • Input Impedance ($h_{ie}$): Ratio of incremental base voltage change to base current change, at constant $V_{CE}$:   $h_{ie} = \left.\frac{\Delta V_{BE}}{\Delta I_B}\right|_{V_{CE} = \text{Constant}}$
  • Output Admittance ($h_{oe}$): Ratio of incremental collector current change to collector voltage change, at constant $I_B$:   $h_{oe} = \left.\frac{\Delta I_C}{\Delta V_{CE}}\right|_{I_B = \text{Constant}}$
  • Forward Current Gain ($h_{fe}$): Ratio of incremental collector current change to base current change, at constant $V_{CE}$:   $h_{fe} = \left.\frac{\Delta I_C}{\Delta I_B}\right|_{V_{CE} = \text{Constant}}$
  • Reverse Voltage Gain ($h_{re}$): Ratio of incremental base voltage change to collector voltage change, at constant $I_B$:   $h_{re} = \left.\frac{\Delta V_{BE}}{\Delta V_{CE}}\right|_{I_B = \text{Constant}}$

Common-Collector (CC) Configuration: Characteristics and Analysis

• Circuit Topology:
  • The collector terminal is common to both input and output circuits and tied to AC ground, earning it the alternate name grounded-collector configuration.
  • Input is applied to the base, and output is extracted directly from the emitter across a load resistor.
  • Also called an emitter follower or voltage follower because the output voltage tracks the input voltage with unity gain ($A_v \approx 1$).

• Input Characteristics:
  • Plots base current ($I_B$) versus collector-base voltage ($V_{CB}$) for fixed values of collector-emitter voltage ($V_{CE}$).
  • Differs significantly from CB and CE curves because the output voltage ($V_{CE}$) directly opposes the input drive.

• Output Characteristics:
  • Plots emitter current ($I_E$) versus collector-emitter voltage ($V_{CE}$) for constant values of base current ($I_B$).
  • Demonstrates a high current gain and very low output resistance, making this configuration well-suited for impedance matching.

• Common-Collector Current Amplification Factor (Gamma, $\gamma$):
  • Defined as the ratio of an incremental change in emitter current to the corresponding change in base current:   $\gamma = \frac{\Delta I_E}{\Delta I_B}$

Interrelationships Among Current Gain Parameters

• Relationship Between $\alpha$ and $\beta$:

  • From the definition of terminal currents, $I_E = I_B + I_C$, so $\Delta I_E = \Delta I_B + \Delta I_C$.
  • Starting from the definition of $\alpha$:   $\alpha = \frac{\Delta I_C}{\Delta I_E} = \frac{\Delta I_C}{\Delta I_B + \Delta I_C}$
  • Taking the reciprocal:   $\frac{1}{\alpha} = \frac{\Delta I_B + \Delta I_C}{\Delta I_C} = \frac{\Delta I_B}{\Delta I_C} + 1 = \frac{1}{\beta} + 1 = \frac{1 + \beta}{\beta}$
  • Solving for $\alpha$:   $\alpha = \frac{\beta}{1 + \beta}$
  • Rearranging to solve for $\beta$:   $\beta = \frac{\alpha}{1 - \alpha}$

• Relationship Involving Current Gain $\gamma$:

  • Expressed via incremental current ratios:   $\gamma = \frac{\Delta I_E}{\Delta I_B} = \frac{\Delta I_E}{\Delta I_E - \Delta I_C}$
  • Dividing the numerator and denominator by $\Delta I_E$:   $\gamma = \frac{1}{1 - \frac{\Delta I_C}{\Delta I_E}} = \frac{1}{1 - \alpha}$
  • Substituting $\alpha = \frac{\beta}{1 + \beta}$ into this expression:   $\gamma = \frac{1}{1 - \frac{\beta}{1 + \beta}} = \frac{1}{\frac{1 + \beta - \beta}{1 + \beta}} = 1 + \beta$
  • Summary relationship between the three current gains:   $\gamma = \beta + 1 = \frac{1}{1 - \alpha}$