Reliability in ATE Slide 1 - 30

Semiconductor Testing

A critical step in chip manufacturing that verifies each devices works as designed. It detects defects and functional bugs from fabrication or design flaws.

Improve Yield, Eliminate Faulty Units, Identify and Correct Bugs, Ensure Conformance

The Purpose of Semiconductor Testing is…

Improve Yield

Measure silicon health and optimize manufacturing quality.

Eliminate Faulty Units

Weed out defective chips before they reach customers.

Identify and Correct Bugs

Enable fixes through software or next design iteration.

Ensure Conformance

Validate each chip’s power, speed, stability against design standards.

Automated Test Equipment (ATE)

Advanced systems used to verify that semiconductor chips function correctly before they reach consumers. They simulate real world conditions by applying electrical signals on the chip and measuring its responses.

Advantest and Teradyne and Cohu

As of 2021, these companies lead the automated test equipment industry.

Wafer Test

Also known as the Chip Probe Test. It is done before the chip is packaged. Helps reduce packaging costs by filtering out defective dies early and provides valuable feedback to fine-tune manufacturing.

Package Test

Known as the final test. Happens after the wafer has been cut and packaged into individual ICs. Ensures that the final IC meets all functional and electrical specifications.

Yield, Defect Level, Defect Density

Key metrics in semiconductor testing.

Yield

The fraction of function, error-free chips produced on a wafer.

Defect Level

Defective Parts per million. Measures the number of chips per one million ships. Lower DPPM means higher product reliability.

Defect Density

Represents the number of defects per unit area of a chip. Value of 0.5 is good.

Scan Testing

Detects manufacturing faults by observing the chip’s internal behavior through scan chains.

Scan Chains

A series of flip-flips that capture and shift data for analysis.

Stuck-At-Fault Testing

Used to detect opens or shorts in logic circuits.

At-Speed Scan Testing

Detects timing-related or transition faults by applying test patterns.

Memory test (Memory BIST)

Tests the embedded memories of the chip.

Power Integrity Test

Focuses on how power is distributed throughout the chip.

DC Voltage Drop Analysis

Statis Voltage Drop. Tests the voltage robustness of power distribution network over a sustained period.

Transient Analysis

Dynamic Voltage Drop. Tests t he power distribution network for instantaneous voltage drop.

Electromagnetic Compatibility (EMC) Tests

Ensure that the chip’s power distribution network does not emit unwanted electromagnetic radiation.

Signal Integrity Tests

Assess how signals propagate within and between different parts of the circuit and focus on maintaining the quality of electrical signals.

Electro-static discharge tests

ESD causes millions of dollars in real losses each later. That is the reason it is critical to evaluate the chip’s response to ESD.

Thermal Tests

Assesses the chip’s performance and reliability under different temperature conditions.

Functional Tests

Assess whether the chips performs its intended functions correctly. This involves applying various inputs and verifying that the outputs match the expected behavior.